Difference between revisions of "STM32F407 Microcontroller"

Revision as of 12:55, 15 August 2013

STM32F407VG Microcontroller Overview

High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 192 Kbyte RAM, 168 MHz CPU, Art Accelerator

• 1 Mbyte of 128 bit wide FLASH with 64 cache lines with prefetch for instructions and 8 cache lines for data.
• Ethernet MAC - 10/100 Mbit/s
• USB - 1 x USB OTG FS, 1 x USB OTX HS
• CRC calculation unit - CRC-32 (Ethernet)
• Hash processor - SHA-1, SHA-224, SHA-256, MD5, HMAC
• Cryptographic processor - DES, Triple-DES, AES-128, AES-192, AES-256
• Flexible static memory controller (FSMC) for 8 or 16 bit external memory
• Random number generator - 32 bit every 40 cycles of PLL48CLK

STM32F407 block diagram

STM32F407 clock tree

Documents and files

• ARM: Cortex-M3 Thumb-2 instruction set
• Latest version of Keil µVision (Register for free to get the download link)
• STM32F407VG microcontroller datasheet
• ARM Cortex®-M4 Technical Reference Manual
• STM32F40xxx Reference Manual
• Programming manual
• STM32F407VG resources (click the Design Resources tab)

GPIO

The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or source up to ±20 mA (with a relaxed VOL/VOH) except PC13, PC14 and PC15 which can sink or source up to ±3mA. When using the PC13 to PC15 GPIOs in output mode, the speed should not exceed 2 MHz with a maximum load of 30 pF.

Memory

Each main block of memory is on a different layer of the bus matrix and can be accessed independently by CPU core or DMA.

FLASH
  Name    Size  Address       Description
  OTP      512        ?       One-time programmable memory for user data

SRAM
  Name    Size  Address       Description
  SRAM1   112KB 0x2000 0000   Main internal SRAM
  SRAM2    16KB 0x2001 C000   Auxiliary internal SRAM
  CCM      64KB 0x1000 0000   Core coupled memory (only accessible by CPU)
  BKPSRAM   4KB 0x4002 4000   Backup SRAM (Battery backup domain)
  FSMC                        Flexible static memory controller (External memory)

Pin functions

• Functions are not in any particular order. For actual implementation and programming values, see Alternate function mapping

Alternate function mapping

STM32F4DISCOVERY Development Board Overview

• (STM32F407VGT6 microcontroller featuring 32-bit ARM Cortex-M4F core, 1 MB Flash, 192 KB RAM in an LQFP100 package
• On-board ST-LINK/V2 with selection mode switch to use the kit as a standalone ST- LINK/V2 (with SWD (Serial Wire Debug) connector for programming and debugging)
• Board power supply: through USB bus or from an external 5 V supply voltage
• External application power supply: 3 V and 5 V
• LIS302DL, ST MEMS motion sensor, 3-axis digital output accelerometer
• MP45DT02, ST MEMS audio sensor, omni-directional digital microphone
• CS43L22, audio DAC with integrated class D speaker driver
• Eight LEDs:

• LD1 (red/green) for USB communication
• LD2 (red) for 3.3 V power on
• Four user LEDs

• LD3 (orange)
• LD4 (green)
• LD5 (red)
• LD6 (blue)

• 2 USB OTG LEDs

• LD7 (green) VBus
• LD8 (red) over-current

• Two push buttons

• user
• reset

• USB OTG FS with micro-AB connector
• Extension header for all LQFP100 I/Os for quick connection to prototyping board and easy probing

Documents and files

• Discovery kit for STM32 F4 series - with STM32F407VG MCU
• STM32F4 high-performance discovery board
• Schematic
• User manual - getting started
• User manual
• Programming manual
• Example code
• About example code

Pinout

Available pins on board

Usable Peripherals

Note: this is an incomplete list, based on ongoing development and testing

1) garbled characters received
2) level may be slightly higher then channel 1 with buffer disabled due to external component input pin. Recommended use of buffer.

Used pins

Notes

• 1. Depends if a USB micro is plugged in, and to what
• 2. Depends if connected IO is in input mode
• 3. Not broken out to pins

CPU core

Cortex M4 Block Diagram

Programming

IMPORTANT: If using Keil µVision with hardware FPU selected in the project options, please be sure to enable the FPU before any floating point numbers are loaded or processed.
This can be done by setting bits 20 to 23 in CPACR (address 0xE000ED88)
If using C, this can be done by:

#define CPACR   						(*((volatile unsigned long *) 0xE000ED88))
CPACR |= 0xFu<<20;