Difference between revisions of "Arty S7"

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(Created page with "* 256 MB DDR3L memory and 16 MB Quad-SPI Flash * Arduino shield and Pmod connectors for adding-on hardware devices * Programmable from JTAG and Quad-SPI flash Category:Co...")
 
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* Arduino shield and Pmod connectors for adding-on hardware devices  
 
* Arduino shield and Pmod connectors for adding-on hardware devices  
 
* Programmable from JTAG and Quad-SPI flash
 
* Programmable from JTAG and Quad-SPI flash
 +
* 100 MHz & 12MHz external clocks
 +
* Internal ADC Dual-channel, 1 MSPS
 +
 +
{| class="wikitable" border="0"
 +
!
 +
! XC7S50-1CSGA324C
 +
! XC7S25-1CSGA324
 +
|-
 +
| '''Logic Slices'''
 +
| 8150
 +
| 3650
 +
|-
 +
| '''6-Input LUTs'''
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|  32 600
 +
|  14 600
 +
|-
 +
| '''Flip-Flops'''
 +
| 65 200
 +
| 29 200
 +
|-
 +
| '''Block RAM'''
 +
|  337.5 KByte
 +
|  202.5 KByte
 +
|-
 +
| '''DSP Slices'''
 +
| 120
 +
|  80
 +
|-
 +
| '''Clock resources'''
 +
| 5 PLLs
 +
| 3 PLLs
 +
|-
 +
|}
 +
 +
 +
  
 
[[Category:Computing]]
 
[[Category:Computing]]

Revision as of 16:42, 17 December 2018

  • 256 MB DDR3L memory and 16 MB Quad-SPI Flash
  • Arduino shield and Pmod connectors for adding-on hardware devices
  • Programmable from JTAG and Quad-SPI flash
  • 100 MHz & 12MHz external clocks
  • Internal ADC Dual-channel, 1 MSPS
XC7S50-1CSGA324C XC7S25-1CSGA324
Logic Slices 8150 3650
6-Input LUTs 32 600 14 600
Flip-Flops 65 200 29 200
Block RAM 337.5 KByte 202.5 KByte
DSP Slices 120 80
Clock resources 5 PLLs 3 PLLs
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