Difference between revisions of "Instruction set: PIC"
From ScienceZero
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==[[PIC]] 16 instruction set== | ==[[PIC]] 16 instruction set== | ||
===Syntax key=== | ===Syntax key=== | ||
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! Field !! Description | ! Field !! Description | ||
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===Instruction set=== | ===Instruction set=== | ||
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! Instruction !! Description !! Flags affected | ! Instruction !! Description !! Flags affected | ||
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===Deprecated instructions=== | ===Deprecated instructions=== | ||
These instructions still work on most models and are useful for optimizations. | These instructions still work on most models and are useful for optimizations. | ||
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! Instruction !! Description !! Flags affected | ! Instruction !! Description !! Flags affected | ||
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==PIC 17 instruction set== | ==PIC 17 instruction set== | ||
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! Instruction !! Description !! Flags affected | ! Instruction !! Description !! Flags affected | ||
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==PIC 18 instruction set== | ==PIC 18 instruction set== | ||
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! Instruction !! Description !! Flags affected | ! Instruction !! Description !! Flags affected | ||
Revision as of 08:56, 17 February 2007
Contents
PIC 16 instruction set
Syntax key
| Field | Description |
|---|---|
| b | Bit address within an 8 bit register |
| d | Destination select, d=0 store results in W, d=1 store register in f |
| f | Register file address 0x00-0xFF |
| k | Literal field (Constant) |
| W | Working register (accumulator) |
Instruction set
| Instruction | Description | Flags affected |
|---|---|---|
| ADDLW k | Add Literal and W | C,DC,Z |
| ADDWF f,d | Add W and f | C,DC,Z |
| ANDLW k | And Literal with W | Z |
| ANDWF f,d | AND W with f | Z |
| BCF f,b | Bit Clear f | - |
| BSF f,b | Bit Set f | - |
| BTFSC f,b | Bit Test, Skip if Clear | - |
| BTFSS f,b | Bit Test f, Skip if Set | - |
| CALL k | Call Subroutine | - |
| CLRF f | Clear f | Z |
| CLRW | Clear W | Z |
| CLRWDT | Clear Watchdog Timer | /TO,/PD |
| COMF f | Complement f | Z |
| DECF f,d | Decrement f | Z |
| DECFSZ f,d | Decrement f, Skip if 0 | - |
| GOTO k | Unconditional Branch | - |
| INCF f,d | Increment f | Z |
| INCFSZ f,d | Increment f, Skip if 0 | - |
| IORLW k | Inclusive OR Literal with W | Z |
| IORWF f,d | Inclusive OR W with f | Z |
| MOVLW k | Move Literal to W | - |
| MOVF f,d | Move f | Z |
| MOVWF f | Move W to f | - |
| NOP | No Operation | - |
| RETFIE | Return from Interrupt | - |
| RETLW k | Return with Literal in W | - |
| RETURN | Return from Subroutine | - |
| RLF f,d | Rotate Left f through Carry | C |
| RRF f,d | Rotate Right f through Carry | C |
| SLEEP | Enter SLEEP mode, stop oscillator | /TO,/PD |
| SUBLW k | Subtract W from Literal | C,DC,Z |
| SUBWF f,d | Subtract W from f | C,DC,Z |
| SWAPF f,d | Swap Nibbles in f | - |
| XORLW k | Exclusive OR Literal with W | Z |
| XORWF f,d | Exclusive OR W with f | Z |
Deprecated instructions
These instructions still work on most models and are useful for optimizations.
| Instruction | Description | Flags affected |
|---|---|---|
| OPTION | Load the OPTION register with the contents of W | - |
| TRIS f | Load a TRIS register with the contents of W | - |
PIC 17 instruction set
| Instruction | Description | Flags affected |
|---|---|---|
| ADDWF f,d | ADD WREG to f | OV,C,DC,Z |
| ADDWFC f,d | ADD WREG and Carry bit to f | OV,C,DC,Z |
| ANDWF f,d | AND WREG with f | Z |
| CLRF f,s | Clear f, or Clear f and Clear WREG | - |
| COMF f,d | Complement f | Z |
| CPFSEQ f | Compare f with WREG, skip if f = WREG | - |
| CPFSGT f | Compare f with WREG, skip if f > WREG | - |
| CPFSLT f | Compare f with WREG, skip if f < WREG | - |
| DAW f,s | Decimal Adjust WREG Register | C |
| DECF f,d | Decrement f | OV,C,DC,Z |
| DECFSZ f,d | Decrement f, skip if 0 | - |
| DCFSNZ f,d | Decrement f, skip if not 0 | - |
| INCF f,d | Increment f | OV,C,DC,Z |
| INCFSZ f,d | Increment f, skip if 0 | - |
| INFSNZ f,d | Increment f, skip if not 0 | - |
| IORWF f,d | Inclusive OR WREG with f | Z |
| MOVFP f,p | Move f to p | - |
| MOVPF p,f | Move p to f | Z |
| MOVWF f | Move WREG to f | - |
| MULWF f | Multiply WREG with f | - |
| NEGW f,s | Negate WREG | OV,C,DC,Z |
| NOP | No Operation | - |
| RLCF f,d | Rotate left f through Carry | C |
| RLNCF f,d | Rotate left f (no carry) | - |
| RRCF f,d | Rotate right f through Carry | C |
| RRNCF f,d | Rotate right f (no carry) | - |
| SETF f,s | Set f | - |
| SUBWF f,d | Subtract WREG from f | OV,C,DC,Z |
| SUBWFB f,d | Subtract WREG from f with Borrow | OV,C,DC,Z |
| SWAPF f,d | Swap f | - |
| TABLRD t,i,f | Table Read | - |
| TABLWT t,i,f | Table Write | - |
| TLRD t,f | Table Latch Read | - |
| TLWT t,f | Table Latch Write | - |
| TSTFSZ f | Test f, skip if 0 | Z |
| XORWF f,d | Exclusive OR WREG with f | Z |
| BCF f,b | Bit Clear f | - |
| BSF f,b | Bit Set f | - |
| BTFSC f,b | Bit test, skip if clear | - |
| BTFSS f,b | Bit test, skip if set | - |
| BTG f,b | Bit Toggle f | - |
| ADDLW k | ADD literal to WREG | OV,C,DC,Z |
| ANDLW k | AND literal with WREG | Z |
| CALL k | Subroutine Call | - |
| CLRWDT | Clear Watchdog Timer | /TO,/PD |
| GOTO k | Unconditional Branch | - |
| IORLW k | Inclusive OR literal with WREG | Z |
| LCALL k | Long Call | - |
| MOVLB k | Move literal to low nibble in BSR | - |
| MOVLR k | Move literal to high nibble in BSR | - |
| MOVLW k | Move literal to WREG | - |
| MULLW k | Multiply literal with WREG | - |
| RETFIE | Return from interrupt (and enable interrupts) | GLINTD |
| RETLW k | Return literal to WREG | - |
| RETURN | Return from subroutine | - |
| SLEEP | Enter SLEEP Mode | /TO,/PD |
| SUBLW k | Subtract WREG from literal | OV,C,DC,Z |
| XORLW k | Exclusive OR literal with WREG | Z |
PIC 18 instruction set
| Instruction | Description | Flags affected |
|---|---|---|
| ADDWF f, d, a | Add WREG and f | C, DC, Z, OV, N |
| ADDWFC f, d, a | Add WREG and Carry bit to f | C, DC, Z, OV, N |
| ANDWF f, d, a | AND WREG with f | Z, N |
| CLRF f, a | Clear f | Z |
| COMF f, d, a | Complement f | Z, N |
| CPFSEQ f, a | Compare f with WREG, skip = | None |
| CPFSGT f, a | Compare f with WREG, skip > | None |
| CPFSLT f, a | Compare f with WREG, skip < | None |
| DECF f, d, a | Decrement f | C, DC, Z, OV, N |
| DECFSZ f, d, a | Decrement f, Skip if 0 | None |
| DCFSNZ f, d, a | Decrement f, Skip if Not 0 | None |
| INCF f, d, a | Increment f | C, DC, Z, OV, N |
| INCFSZ f, d, a | Increment f, Skip if 0 | None |
| INFSNZ f, d, a | Increment f, Skip if Not 0 | None |
| IORWF f, d, a | Inclusive OR WREG with f | Z, N |
| MOVF f, d, a | Move f | Z, N |
| MOVFF fs, fd | Move fs to fd | None |
| MOVWF f, a | Move WREG to f | None |
| MULWF f, a | Multiply WREG with f | None |
| NEGF f, a | Negate f | C, DC, Z, OV, N |
| RLCF f, d, a | Rotate Left f through Carry | C, Z, N |
| RLNCF f, d, a | Rotate Left f (No Carry) | Z, N |
| RRCF f, d, a | Rotate Right f through Carry | C, Z, N |
| RRNCF f, d, a | Rotate Right f (No Carry) | Z, N |
| SETF f, a | Set f | None |
| SUBFWB f, d, a | Subtract f from WREG with borrow | C, DC, Z, OV, N |
| SUBWF f, d, a | Subtract WREG from f | C, DC, Z, OV, N |
| SUBWFB f, d, a | Subtract WREG from f with borrow | C, DC, Z, OV, N |
| SWAPF f, d, a | Swap nibbles in f | None |
| TSTFSZ f, a | Test f, skip if 0 | None |
| XORWF f, d, a | Exclusive OR WREG with f | Z, N |
| BCF f, b, a | Bit Clear f | None |
| BSF f, b, a | Bit Set f | None |
| BTFSC f, b, a | Bit Test f, Skip if Clear | None |
| BTFSS f, b, a | Bit Test f, Skip if Set | None |
| BTG f, d, a | Bit Toggle f | None |
| BC n | Branch if Carry | None |
| BN n | Branch if Negative | None |
| BNC n | Branch if Not Carry | None |
| BNN n | Branch if Not Negative | None |
| BNOV n | Branch if Not Overflow | None |
| BNZ n | Branch if Not Zero | None |
| BOV n | Branch if Overflow | None |
| BRA n | Branch Unconditionally | None |
| BZ n | Branch if Zero | None |
| CALL n, s | Call subroutine | None |
| CLRWDT | Clear Watchdog Timer | /TO, /PD |
| DAW | Decimal Adjust WREG | C |
| GOTO n | Go to address | None |
| NOP | No Operation | None |
| POP | Pop top of return stack (TOS) | None |
| PUSH | Push top of return stack (TOS) | None |
| RCALL n | Relative Call | None |
| RESET | Software device Reset | All |
| RETFIE s | Return from interrupt enable | GIE/GIEH,PEIE/GIEL |
| RETLW k | Return with literal in WREG | None |
| RETURN s | Return from Subroutine | None |
| SLEEP | Go into Standby mode | TO, PD |
| ADDLW k | Add literal and WREG | C, DC, Z, OV, N |
| ANDLW k | AND literal with WREG | Z, N |
| IORLW k | Inclusive OR literal with WREG | Z, N |
| LFSR f, k | Move literal (12-bit) to FSRx | None |
| MOVLB k | Move literal to BSR<3:0> | None |
| MOVLW k | Move literal to WREG | None |
| MULLW k | Multiply literal with WREG | None |
| RETLW k | Return with literal in WREG | None |
| SUBLW k | Subtract WREG from literal | C, DC, Z, OV, N |
| XORLW k | Exclusive OR literal with WREG | Z, N |
| TBLRD* | Table Read | None |
| TBLRD*+ | Table Read with post-increment | None |
| TBLRD*- | Table Read with post-decrement | None |
| TBLRD+* | Table Read with pre-increment | None |
| TBLWT* | Table Write | None |
| TBLWT*+ | Table Write with post-increment | None |
| TBLWT*- | Table Write with post-decrement | None |
| TBLWT+* | Table Write with pre-increment | None |
