Difference between revisions of "STM32F407 Microcontroller"
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Each main block of memory is on a different layer of the bus matrix and can be accessed independently by CPU core or DMA. | Each main block of memory is on a different layer of the bus matrix and can be accessed independently by CPU core or DMA. | ||
− | + | Embedded Flash | |
− | Name | + | '''Name Address Size Bus* Description''' |
− | OTP 512 | + | Main 0x0800 0000 1MB ID Sectors: 4 x 16KB, 1 x 64KB, 7 x 128KB |
+ | System 0x1FFF 0000 30KB ID Bootloader | ||
+ | OTP 0x1FFF 7800 528B ID 512 Bytes of one-time programmable memory for user data and 16 lock bytes | ||
+ | Option 0x1FFF C000 16B ID Configuration of read and write protection, BOR level, watchdog, software/hardware and reset | ||
SRAM | SRAM | ||
− | Name | + | '''Name Address Size Bus Description''' |
− | SRAM1 | + | SRAM1 0x2000 0000 112KB IDS Main internal SRAM |
− | SRAM2 | + | SRAM2 0x2001 C000 16KB S Auxiliary internal SRAM |
− | CCM | + | CCM 0x1000 0000 64KB D Core coupled memory ( only accessible by CPU ) |
− | BKPSRAM | + | BKPSRAM 0x4002 4000 4KB S Backup SRAM ( Battery backup domain ) |
− | FSMC | + | FSMC B1 0x6000 0000 256MB IDS NOR / PSRAM ( Flexible static memory controller (External memory) ) |
+ | FSMC B2 0x7000 0000 256MB IDS NAND Flash | ||
+ | FSMC B3 0x8000 0000 256MB IDS NAND Flash | ||
+ | FSMC B4 0x9000 0000 256MB IDS PC Card | ||
+ | |||
+ | '''*'''I = Instruction bus, D = Data bus, S = System bus | ||
=== Pin functions === | === Pin functions === | ||
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| bgcolor="#FFFFFF" | SPI3_NSS | | bgcolor="#FFFFFF" | SPI3_NSS | ||
| bgcolor="#FFFFFF" | I2S3_WS | | bgcolor="#FFFFFF" | I2S3_WS | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | TIM2_CH1_ETR |
| bgcolor="#FFFFFF" | SPI1_NSS | | bgcolor="#FFFFFF" | SPI1_NSS | ||
| bgcolor="#FFFFFF" | EVENTOUT | | bgcolor="#FFFFFF" | EVENTOUT | ||
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| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | OTG_HS_ULPI_STP | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
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|- | |- | ||
| bgcolor="#FFFFFF" | PC1 | | bgcolor="#FFFFFF" | PC1 | ||
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| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | ETH_MDC | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
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| bgcolor="#FFFFFF" | PC2 | | bgcolor="#FFFFFF" | PC2 | ||
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| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SPI2_MISO | ||
+ | | bgcolor="#FFFFFF" | I2S2ext_SD | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | OTG_HS_ULPI_DIR | ||
+ | | bgcolor="#FFFFFF" | ETH _MII_TXD2 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
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| bgcolor="#FFFFFF" | PC3 | | bgcolor="#FFFFFF" | PC3 | ||
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| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SPI2_MOSI<br />I2S2_SD | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | OTG_HS_ULPI_NXT | ||
+ | | bgcolor="#FFFFFF" | ETH_MII_TX_CLK | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
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|- | |- | ||
| bgcolor="#FFFFFF" | PC4 | | bgcolor="#FFFFFF" | PC4 | ||
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| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | ETH_MII_RXD0<br />ETH_RMII_RXD0 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PC5 | | bgcolor="#FFFFFF" | PC5 | ||
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| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | ETH _MII_RXD1<br />ETH _RMII_RXD1 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PC6 | | bgcolor="#FFFFFF" | PC6 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM3_CH1 | ||
+ | | bgcolor="#FFFFFF" | TIM8_CH1 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | I2S2_MCK | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | USART6_TX | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SDIO_D6 | ||
+ | | bgcolor="#FFFFFF" | DCMI_D0 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
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|- | |- | ||
| bgcolor="#FFFFFF" | PC7 | | bgcolor="#FFFFFF" | PC7 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM3_CH2 | ||
+ | | bgcolor="#FFFFFF" | TIM8_CH2 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | I2S3_MCK | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | USART6_RX | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SDIO_D7 | ||
+ | | bgcolor="#FFFFFF" | DCMI_D1 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
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|- | |- | ||
| bgcolor="#FFFFFF" | PC8 | | bgcolor="#FFFFFF" | PC8 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM3_CH3 | ||
+ | | bgcolor="#FFFFFF" | TIM8_CH3 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | USART6_CK | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SDIO_D0 | ||
+ | | bgcolor="#FFFFFF" | DCMI_D2 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
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− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PC9 | | bgcolor="#FFFFFF" | PC9 | ||
+ | | bgcolor="#FFFFFF" | MCO2 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM3_CH4 | ||
+ | | bgcolor="#FFFFFF" | TIM8_CH4 | ||
+ | | bgcolor="#FFFFFF" | I2C3_SDA | ||
+ | | bgcolor="#FFFFFF" | I2S_CKIN | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
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| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SDIO_D1 | ||
+ | | bgcolor="#FFFFFF" | DCMI_D3 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
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|- | |- | ||
| bgcolor="#FFFFFF" | PC10 | | bgcolor="#FFFFFF" | PC10 | ||
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| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SPI3_SCK<br />I2S3_CK | ||
+ | | bgcolor="#FFFFFF" | USART3_TX | ||
+ | | bgcolor="#FFFFFF" | UART4_TX | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SDIO_D2 | ||
+ | | bgcolor="#FFFFFF" | DCMI_D8 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
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|- | |- | ||
| bgcolor="#FFFFFF" | PC11 | | bgcolor="#FFFFFF" | PC11 | ||
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| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | I2S3ext_SD | ||
+ | | bgcolor="#FFFFFF" | SPI3_MISO | ||
+ | | bgcolor="#FFFFFF" | USART3_RX | ||
+ | | bgcolor="#FFFFFF" | UART4_RX | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SDIO_D3 | ||
+ | | bgcolor="#FFFFFF" | DCMI_D4 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
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|- | |- | ||
| bgcolor="#FFFFFF" | PC12 | | bgcolor="#FFFFFF" | PC12 | ||
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| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SPI3_MOSI<br />I2S3_SD | ||
+ | | bgcolor="#FFFFFF" | USART3_CK | ||
+ | | bgcolor="#FFFFFF" | UART5_TX | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SDIO_CK | ||
+ | | bgcolor="#FFFFFF" | DCMI_D9 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
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|- | |- | ||
| bgcolor="#FFFFFF" | PC13 | | bgcolor="#FFFFFF" | PC13 | ||
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| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
|- | |- | ||
| bgcolor="#FFFFFF" | PC14 | | bgcolor="#FFFFFF" | PC14 | ||
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| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
|- | |- | ||
| bgcolor="#FFFFFF" | PC15 | | bgcolor="#FFFFFF" | PC15 | ||
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| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
|- | |- | ||
| bgcolor="#F0F0F0" | PD0 | | bgcolor="#F0F0F0" | PD0 | ||
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| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | CAN1_RX | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_D2 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
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|- | |- | ||
| bgcolor="#F0F0F0" | PD1 | | bgcolor="#F0F0F0" | PD1 | ||
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| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | CAN1_TX | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_D3 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
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| bgcolor="#F0F0F0" | PD2 | | bgcolor="#F0F0F0" | PD2 | ||
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| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | UART5_RX | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | SDIO_CMD | ||
+ | | bgcolor="#F0F0F0" | DCMI_D11 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
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| bgcolor="#F0F0F0" | PD3 | | bgcolor="#F0F0F0" | PD3 | ||
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| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | USART2_CTS | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_CLK | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
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| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | USART2_RTS | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_NOE | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
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| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | USART2_TX | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_NWE | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
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| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | USART2_RX | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_NWAIT | ||
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| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
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| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | USART2_CK | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_NE1<br />FSMC_NCE2 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
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| bgcolor="#F0F0F0" | PD8 | | bgcolor="#F0F0F0" | PD8 | ||
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| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | USART3_TX | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_D13 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
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| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | USART3_RX | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_D14 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PD10 | | bgcolor="#F0F0F0" | PD10 | ||
Line 2,475: | Line 2,483: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | USART3_CK | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_D15 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PD11 | | bgcolor="#F0F0F0" | PD11 | ||
Line 2,493: | Line 2,501: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | USART3_CTS | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_A16 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PD12 | | bgcolor="#F0F0F0" | PD12 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM4_CH1 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | USART3_RTS | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_A17 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PD13 | | bgcolor="#F0F0F0" | PD13 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM4_CH2 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 2,533: | Line 2,542: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_A18 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PD14 | | bgcolor="#F0F0F0" | PD14 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM4_CH3 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 2,551: | Line 2,560: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_D0 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PD15 | | bgcolor="#F0F0F0" | PD15 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM4_CH4 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 2,569: | Line 2,578: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_D1 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE0 | | bgcolor="#FFFFFF" | PE0 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM4_ETR | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,587: | Line 2,596: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_NBL0 | ||
+ | | bgcolor="#FFFFFF" | DCMI_D2 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE1 | | bgcolor="#FFFFFF" | PE1 | ||
Line 2,606: | Line 2,614: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_NBL1 | ||
+ | | bgcolor="#FFFFFF" | DCMI_D3 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE2 | | bgcolor="#FFFFFF" | PE2 | ||
+ | | bgcolor="#FFFFFF" | TRACECLK | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,622: | Line 2,631: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | ETH _MII_TXD3 | ||
+ | | bgcolor="#FFFFFF" | FSMC_A23 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE3 | | bgcolor="#FFFFFF" | PE3 | ||
+ | | bgcolor="#FFFFFF" | TRACED0 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,641: | Line 2,650: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_A19 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE4 | | bgcolor="#FFFFFF" | PE4 | ||
+ | | bgcolor="#FFFFFF" | TRACED1 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,659: | Line 2,668: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_A20 | ||
+ | | bgcolor="#FFFFFF" | DCMI_D4 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE5 | | bgcolor="#FFFFFF" | PE5 | ||
+ | | bgcolor="#FFFFFF" | TRACED2 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM9_CH1 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,676: | Line 2,686: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_A21 | ||
+ | | bgcolor="#FFFFFF" | DCMI_D6 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE6 | | bgcolor="#FFFFFF" | PE6 | ||
+ | | bgcolor="#FFFFFF" | TRACED3 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM9_CH2 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,694: | Line 2,704: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_A22 | ||
+ | | bgcolor="#FFFFFF" | DCMI_D7 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE7 | | bgcolor="#FFFFFF" | PE7 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM1_ETR | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,713: | Line 2,722: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_D4 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE8 | | bgcolor="#FFFFFF" | PE8 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | IM1_CH1N | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,731: | Line 2,740: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_D5 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE9 | | bgcolor="#FFFFFF" | PE9 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM1_CH1 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,749: | Line 2,758: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_D6 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE10 | | bgcolor="#FFFFFF" | PE10 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM1_CH2N | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,767: | Line 2,776: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_D7 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE11 | | bgcolor="#FFFFFF" | PE11 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM1_CH2 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,785: | Line 2,794: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_D8 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE12 | | bgcolor="#FFFFFF" | PE12 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM1_CH3N | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,803: | Line 2,812: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_D9 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE13 | | bgcolor="#FFFFFF" | PE13 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM1_CH3 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,821: | Line 2,830: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_D10 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE14 | | bgcolor="#FFFFFF" | PE14 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM1_CH4 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,839: | Line 2,848: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_D11 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE15 | | bgcolor="#FFFFFF" | PE15 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM1_BKIN | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 2,857: | Line 2,866: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_D12 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF0 | | bgcolor="#F0F0F0" | PF0 | ||
Line 2,868: | Line 2,876: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | I2C2_SDA | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 2,875: | Line 2,884: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_A0 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF1 | | bgcolor="#F0F0F0" | PF1 | ||
Line 2,886: | Line 2,894: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | I2C2_SCL | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 2,893: | Line 2,902: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_A1 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF2 | | bgcolor="#F0F0F0" | PF2 | ||
Line 2,904: | Line 2,912: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | 2C2_SMBA | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 2,911: | Line 2,920: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_A2 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF3 | | bgcolor="#F0F0F0" | PF3 | ||
Line 2,930: | Line 2,938: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_A3 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF4 | | bgcolor="#F0F0F0" | PF4 | ||
Line 2,948: | Line 2,956: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_A4 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF5 | | bgcolor="#F0F0F0" | PF5 | ||
Line 2,966: | Line 2,974: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_A5 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF6 | | bgcolor="#F0F0F0" | PF6 | ||
Line 2,975: | Line 2,983: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM10_CH1 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 2,983: | Line 2,992: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_NIORD | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF7 | | bgcolor="#F0F0F0" | PF7 | ||
Line 2,993: | Line 3,001: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM11_CH1 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 3,001: | Line 3,010: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_NREG | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF8 | | bgcolor="#F0F0F0" | PF8 | ||
Line 3,017: | Line 3,025: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM13_CH1 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_NIOWR | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF9 | | bgcolor="#F0F0F0" | PF9 | ||
Line 3,035: | Line 3,043: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM14_CH1 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_CD | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF10 | | bgcolor="#F0F0F0" | PF10 | ||
Line 3,056: | Line 3,064: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_INTR | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF11 | | bgcolor="#F0F0F0" | PF11 | ||
Line 3,075: | Line 3,083: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | DCMI_D12 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF12 | | bgcolor="#F0F0F0" | PF12 | ||
Line 3,092: | Line 3,100: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_A6 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF13 | | bgcolor="#F0F0F0" | PF13 | ||
Line 3,110: | Line 3,118: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_A7 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF14 | | bgcolor="#F0F0F0" | PF14 | ||
Line 3,128: | Line 3,136: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_A8 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PF15 | | bgcolor="#F0F0F0" | PF15 | ||
Line 3,145: | Line 3,153: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | FSMC_A9 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG0 | | bgcolor="#FFFFFF" | PG0 | ||
Line 3,164: | Line 3,172: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_A10 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG1 | | bgcolor="#FFFFFF" | PG1 | ||
Line 3,182: | Line 3,190: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_A11 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG2 | | bgcolor="#FFFFFF" | PG2 | ||
Line 3,200: | Line 3,208: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_A12 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG3 | | bgcolor="#FFFFFF" | PG3 | ||
Line 3,218: | Line 3,226: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_A13 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG4 | | bgcolor="#FFFFFF" | PG4 | ||
Line 3,236: | Line 3,244: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_A14 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG5 | | bgcolor="#FFFFFF" | PG5 | ||
Line 3,254: | Line 3,262: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_A15 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG6 | | bgcolor="#FFFFFF" | PG6 | ||
Line 3,272: | Line 3,280: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_INT2 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG7 | | bgcolor="#FFFFFF" | PG7 | ||
Line 3,286: | Line 3,294: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | USART6_CK | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_INT3 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG8 | | bgcolor="#FFFFFF" | PG8 | ||
Line 3,304: | Line 3,312: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | USART6_RTS | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | ETH _PPS_OUT | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG9 | | bgcolor="#FFFFFF" | PG9 | ||
Line 3,322: | Line 3,330: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | USART6_RX | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_NE2<br />FSMC_NCE3 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG10 | | bgcolor="#FFFFFF" | PG10 | ||
Line 3,344: | Line 3,352: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_NCE4_1<br />FSMC_NE3 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG11 | | bgcolor="#FFFFFF" | PG11 | ||
Line 3,361: | Line 3,369: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | ETH _MII_TX_EN<br />ETH _RMII_TX_EN | ||
+ | | bgcolor="#FFFFFF" | FSMC_NCE4_2 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG12 | | bgcolor="#FFFFFF" | PG12 | ||
Line 3,376: | Line 3,384: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | USART6_RTS | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | FSMC_NE4 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG13 | | bgcolor="#FFFFFF" | PG13 | ||
Line 3,394: | Line 3,402: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | UART6_CTS | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | ETH _MII_TXD0<br />ETH _RMII_TXD0 | ||
+ | | bgcolor="#FFFFFF" | FSMC_A24 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG14 | | bgcolor="#FFFFFF" | PG14 | ||
Line 3,412: | Line 3,420: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | USART6_TX | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | ETH _MII_TXD1<br />ETH _RMII_TXD1 | ||
+ | | bgcolor="#FFFFFF" | FSMC_A25 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PG15 | | bgcolor="#FFFFFF" | PG15 | ||
Line 3,430: | Line 3,438: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | USART6_CTS | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | DCMI_D13 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH0 | | bgcolor="#F0F0F0" | PH0 | ||
Line 3,455: | Line 3,463: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
|- | |- | ||
| bgcolor="#F0F0F0" | PH1 | | bgcolor="#F0F0F0" | PH1 | ||
Line 3,473: | Line 3,481: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
|- | |- | ||
| bgcolor="#F0F0F0" | PH2 | | bgcolor="#F0F0F0" | PH2 | ||
Line 3,487: | Line 3,495: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | ETH _MII_CRS | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH3 | | bgcolor="#F0F0F0" | PH3 | ||
Line 3,505: | Line 3,513: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | ETH _MII_COL | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH4 | | bgcolor="#F0F0F0" | PH4 | ||
Line 3,516: | Line 3,524: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | I2C2_SCL | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 3,521: | Line 3,530: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | OTG_HS_ULPI_NXT | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH5 | | bgcolor="#F0F0F0" | PH5 | ||
Line 3,534: | Line 3,542: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | I2C2_SDA | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 3,544: | Line 3,553: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH6 | | bgcolor="#F0F0F0" | PH6 | ||
Line 3,552: | Line 3,560: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | I2C2_SMBA | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM12_CH1 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | ETH _MII_RXD2 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH7 | | bgcolor="#F0F0F0" | PH7 | ||
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| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | I2C3_SCL | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 3,576: | Line 3,585: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | ETH _MII_RXD3 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH8 | | bgcolor="#F0F0F0" | PH8 | ||
Line 3,588: | Line 3,596: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | I2C3_SDA | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 3,596: | Line 3,605: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | DCMI_HSYNC | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH9 | | bgcolor="#F0F0F0" | PH9 | ||
Line 3,606: | Line 3,614: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | I2C3_SMBA | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM12_CH2 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | DCMI_D0 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH10 | | bgcolor="#F0F0F0" | PH10 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM5_CH1 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 3,632: | Line 3,641: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | DCMI_D1 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH11 | | bgcolor="#F0F0F0" | PH11 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM5_CH2 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 3,650: | Line 3,659: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | DCMI_D2 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH12 | | bgcolor="#F0F0F0" | PH12 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM5_CH3 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 3,668: | Line 3,677: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | DCMI_D3 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH13 | | bgcolor="#F0F0F0" | PH13 | ||
Line 3,677: | Line 3,685: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM8_CH1N | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 3,682: | Line 3,691: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | CAN1_TX | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 3,687: | Line 3,697: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH14 | | bgcolor="#F0F0F0" | PH14 | ||
Line 3,695: | Line 3,703: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM8_CH2N | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 3,704: | Line 3,713: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | DCMI_D4 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#F0F0F0" | PH15 | | bgcolor="#F0F0F0" | PH15 | ||
Line 3,713: | Line 3,721: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | TIM8_CH3N | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
Line 3,722: | Line 3,731: | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
+ | | bgcolor="#F0F0F0" | DCMI_D11 | ||
| bgcolor="#F0F0F0" | | | bgcolor="#F0F0F0" | | ||
− | | bgcolor="#F0F0F0" | | + | | bgcolor="#F0F0F0" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PI0 | | bgcolor="#FFFFFF" | PI0 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM5_CH4 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SPI2_NSS<br />I2S2_WS | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 3,739: | Line 3,749: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | DCMI_D13 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PI1 | | bgcolor="#FFFFFF" | PI1 | ||
Line 3,751: | Line 3,759: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SPI2_SCK<br />I2S2_CK | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 3,758: | Line 3,767: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | DCMI_D8 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PI2 | | bgcolor="#FFFFFF" | PI2 | ||
Line 3,767: | Line 3,775: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM8_CH4 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SPI2_MISO | ||
+ | | bgcolor="#FFFFFF" | I2S2ext_SD | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 3,774: | Line 3,785: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | DCMI_D8 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PI3 | | bgcolor="#FFFFFF" | PI3 | ||
Line 3,785: | Line 3,793: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM8_ETR | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | SPI2_MOSI<br />I2S2_SD | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 3,793: | Line 3,803: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | DCMI_D8 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PI4 | | bgcolor="#FFFFFF" | PI4 | ||
Line 3,803: | Line 3,811: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM8_BKIN | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 3,812: | Line 3,821: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | DCMI_D5 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PI5 | | bgcolor="#FFFFFF" | PI5 | ||
Line 3,821: | Line 3,829: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM8_CH1 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 3,830: | Line 3,839: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | DCMI_VSYNC | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PI6 | | bgcolor="#FFFFFF" | PI6 | ||
Line 3,839: | Line 3,847: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM8_CH2 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 3,848: | Line 3,857: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | DCMI_D6 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PI7 | | bgcolor="#FFFFFF" | PI7 | ||
Line 3,857: | Line 3,865: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | TIM8_CH3 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 3,866: | Line 3,875: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | DCMI_D7 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PI8 | | bgcolor="#FFFFFF" | PI8 | ||
Line 3,887: | Line 3,895: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
|- | |- | ||
| bgcolor="#FFFFFF" | PI9 | | bgcolor="#FFFFFF" | PI9 | ||
Line 3,899: | Line 3,907: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | CAN1_RX | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
Line 3,904: | Line 3,913: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PI10 | | bgcolor="#FFFFFF" | PI10 | ||
Line 3,919: | Line 3,927: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | ETH _MII_RX_ER | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PI11 | | bgcolor="#FFFFFF" | PI11 | ||
Line 3,936: | Line 3,944: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | OTG_HS_ULPI_DIR | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | EVENTOUT |
− | + | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PI12 | | bgcolor="#FFFFFF" | PI12 | ||
Line 4,014: | Line 4,022: | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | |} | ||
+ | |||
+ | ===ADC Mapping=== | ||
+ | {| class="wikitable" border="1" cellspacing="0" | style="text-align:center" | ||
+ | |+ '''ADC channel mapping''' | ||
+ | | '''Channel''' | ||
+ | | '''ADC1''' | ||
+ | | '''ADC2''' | ||
+ | | '''ADC3''' | ||
+ | |- | ||
+ | | '''0''' | ||
+ | | PA0 | ||
+ | | PA0 | ||
+ | | PA0 | ||
+ | |- | ||
+ | | '''1''' | ||
+ | | PA1 | ||
+ | | PA1 | ||
+ | | PA1 | ||
+ | |- | ||
+ | | '''2''' | ||
+ | | PA2 | ||
+ | | PA2 | ||
+ | | PA2 | ||
+ | |- | ||
+ | | '''3''' | ||
+ | | PA3 | ||
+ | | PA3 | ||
+ | | PA3 | ||
+ | |- | ||
+ | | '''4''' | ||
+ | | PA4 | ||
+ | | PA4 | ||
+ | | | ||
+ | |- | ||
+ | | '''5''' | ||
+ | | PA5 | ||
+ | | PA5 | ||
+ | | | ||
+ | |- | ||
+ | | '''6''' | ||
+ | | PA6 | ||
+ | | PA6 | ||
+ | | | ||
+ | |- | ||
+ | | '''7''' | ||
+ | | PA7 | ||
+ | | PA7 | ||
+ | | | ||
+ | |- | ||
+ | | '''8''' | ||
+ | | PB0 | ||
+ | | PB0 | ||
+ | | | ||
+ | |- | ||
+ | | '''9''' | ||
+ | | PB1 | ||
+ | | PB1 | ||
+ | | | ||
+ | |- | ||
+ | | '''10''' | ||
+ | | PC0 | ||
+ | | PC0 | ||
+ | | PC0 | ||
+ | |- | ||
+ | | '''11''' | ||
+ | | PC1 | ||
+ | | PC1 | ||
+ | | PC1 | ||
+ | |- | ||
+ | | '''12''' | ||
+ | | PC2 | ||
+ | | PC2 | ||
+ | | PC2 | ||
+ | |- | ||
+ | | '''13''' | ||
+ | | PC3 | ||
+ | | PC3 | ||
+ | | PC3 | ||
+ | |- | ||
+ | | '''14''' | ||
+ | | PC4 | ||
+ | | PC4 | ||
+ | | | ||
+ | |- | ||
+ | | '''15''' | ||
+ | | PC5 | ||
+ | | PC5 | ||
+ | | | ||
+ | |- | ||
+ | | '''16''' | ||
+ | | temperature sensor | ||
+ | | | ||
+ | | | ||
+ | |- | ||
+ | | '''17''' | ||
+ | | VREFINT | ||
+ | | | ||
+ | | | ||
+ | |- | ||
+ | | '''18''' | ||
+ | | VBAT/2 | ||
+ | | | ||
+ | | | ||
|} | |} | ||
== [http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/PF252419 STM32F4DISCOVERY] Development Board Overview == | == [http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/PF252419 STM32F4DISCOVERY] Development Board Overview == | ||
− | [[File:STM32F4_board. | + | [[File:STM32F4_board-3.jpg|thumb]] |
*(STM32F407VGT6 microcontroller featuring 32-bit ARM Cortex-M4F core, 1 MB Flash, 192 KB RAM in an LQFP100 package | *(STM32F407VGT6 microcontroller featuring 32-bit ARM Cortex-M4F core, 1 MB Flash, 192 KB RAM in an LQFP100 package | ||
* On-board ST-LINK/V2 with selection mode switch to use the kit as a standalone ST- LINK/V2 (with SWD ([http://www.arm.com/products/system-ip/debug-trace/coresight-soc-components/serial-wire-debug.php Serial Wire Debug]) connector for programming and debugging) | * On-board ST-LINK/V2 with selection mode switch to use the kit as a standalone ST- LINK/V2 (with SWD ([http://www.arm.com/products/system-ip/debug-trace/coresight-soc-components/serial-wire-debug.php Serial Wire Debug]) connector for programming and debugging) | ||
Line 4,242: | Line 4,354: | ||
|} | |} | ||
− | === | + | === Usable Peripherals === |
− | {| class="wikitable" border="1" cellspacing="0" | style="text-align:left | + | Note: this is an incomplete list, based on ongoing development and testing |
− | |+ ''' | + | |
+ | {| class="wikitable" border="1" cellspacing="0" | style="text-align:left | ||
+ | |+'''Usable Peripherals''' | ||
+ | | '''Peripheral''' | ||
+ | | '''Function''' | ||
| '''Pin''' | | '''Pin''' | ||
− | |||
− | |||
|- | |- | ||
− | | bgcolor="#FFFFFF" | | + | |bgcolor="#FFFFFF" | USART1 |
− | | bgcolor="#FFFFFF" | | + | |bgcolor="#FFFFFF" | TX |
− | + | |bgcolor="#FFFFFF" | <span style="color:red">PA9</span> (1) | |
− | + | ||
|- | |- | ||
− | | bgcolor="#FFFFFF" | PA4 | + | |bgcolor="#FFFFFF" | USART1 |
+ | |bgcolor="#FFFFFF" | RX | ||
+ | |bgcolor="#FFFFFF" | <span style="color:green">PA10</span> | ||
+ | |- | ||
+ | |bgcolor="#F0F0F0" | USART2 | ||
+ | |bgcolor="#F0F0F0" | TX | ||
+ | |bgcolor="#F0F0F0" | <span style="color:green">PA2</span> | ||
+ | |- | ||
+ | |bgcolor="#F0F0F0" | USART2 | ||
+ | |bgcolor="#F0F0F0" | RX | ||
+ | |bgcolor="#F0F0F0" | <span style="color:green">PA3</span> | ||
+ | |- | ||
+ | |bgcolor="#FFFFFF" | USART3 | ||
+ | |bgcolor="#FFFFFF" | TX | ||
+ | |bgcolor="#FFFFFF" | <span style="color:green">PB10</span> | ||
+ | |- | ||
+ | |bgcolor="#FFFFFF" | USART3 | ||
+ | |bgcolor="#FFFFFF" | RX | ||
+ | |bgcolor="#FFFFFF" | <span style="color:green">PB11</span> | ||
+ | |- | ||
+ | |bgcolor="#F0F0F0" | UART4 | ||
+ | |bgcolor="#F0F0F0" | TX | ||
+ | |bgcolor="#F0F0F0" | <span style="color:green">PA0</span> | ||
+ | |- | ||
+ | |bgcolor="#F0F0F0" | UART4 | ||
+ | |bgcolor="#F0F0F0" | RX | ||
+ | |bgcolor="#F0F0F0" | <span style="color:green">PA1</span> | ||
+ | |- | ||
+ | |bgcolor="#FFFFFF" | UART5 | ||
+ | |bgcolor="#FFFFFF" | TX | ||
+ | |bgcolor="#FFFFFF" | <span style="color:green">PC12</span> | ||
+ | |- | ||
+ | |bgcolor="#FFFFFF" | UART5 | ||
+ | |bgcolor="#FFFFFF" | RX | ||
+ | |bgcolor="#FFFFFF" | <span style="color:green">PD2</span> | ||
+ | |- | ||
+ | |bgcolor="#F0F0F0" | USART6 | ||
+ | |bgcolor="#F0F0F0" | TX | ||
+ | |bgcolor="#F0F0F0" | <span style="color:green">PC6</span> | ||
+ | |- | ||
+ | |bgcolor="#F0F0F0" | USART6 | ||
+ | |bgcolor="#F0F0F0" | RX | ||
+ | |bgcolor="#F0F0F0" | <span style="color:green">PC7</span> | ||
+ | |- | ||
+ | |bgcolor="#FFFFFF" | DAC | ||
+ | |bgcolor="#FFFFFF" | OUT1 | ||
+ | |bgcolor="#FFFFFF" | <span style="color:green">PA4</span> | ||
+ | |- | ||
+ | |bgcolor="#FFFFFF" | DAC | ||
+ | |bgcolor="#FFFFFF" | OUT2 | ||
+ | |bgcolor="#FFFFFF" | <span style="color:green">PA5</span> (2) | ||
+ | |} | ||
+ | 1) garbled characters received<br /> | ||
+ | 2) level may be slightly higher then channel 1 with buffer disabled due to external component input pin. Recommended use of buffer. | ||
+ | |||
+ | === PCB IO map === | ||
+ | {| class="wikitable" border="1" cellspacing="0" | style="text-align:left" | ||
+ | |+ '''IO connections''' | ||
+ | | align="center" | '''Pin''' | ||
+ | | align="center" | '''Direction''' | ||
+ | | align="center" | '''Connected to''' | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" | PA0 | ||
+ | | bgcolor="#FFFFFF" align="center" | ← | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | *user/wake button. PA0->330R->off: 220R to GND on: VDD | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PA1 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | *CS43L22 | + | |- |
+ | | bgcolor="#FFFFFF" style="color:green" | PA2 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PA3 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" | PA4 | ||
+ | | bgcolor="#FFFFFF" align="center" | → | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | *Audio CS43L22 I2S3 WS | ||
+ | *DAC mode → 100R → CS43L22 AIN1 | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PA5 | | bgcolor="#FFFFFF" | PA5 | ||
− | | bgcolor="#FFFFFF" | → | + | | bgcolor="#FFFFFF" align="center" | → |
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | *LIS302DL SCL/SPC | + | *LIS302DL (accelerometer) SPI SCK (SCL/SPC) |
|- | |- | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | PA6 |
+ | | bgcolor="#FFFFFF" align="center" | ← | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | *LIS302DL (accelerometer) SPI MISO (SDO) | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" | PA7 | ||
+ | | bgcolor="#FFFFFF" align="center" | → | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | *LIS302DL SDA/SDI/SDO | + | *LIS302DL (accelerometer) SPI MOSI (SDA/SDI/SDO) |
|- | |- | ||
− | | bgcolor="#FFFFFF" | PA8 | + | | bgcolor="#FFFFFF" style="color:green" | PA8 |
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | |||
|- | |- | ||
| bgcolor="#FFFFFF" | PA9 | | bgcolor="#FFFFFF" | PA9 | ||
− | | bgcolor="#FFFFFF" | + | | bgcolor="#FFFFFF" align="center" | ← |
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | * | + | *USB OTG VBUS (from STMPS2141STR power switch) |
− | + | ||
− | + | ||
|- | |- | ||
− | | bgcolor="#FFFFFF" | PA10 | + | | bgcolor="#FFFFFF" style="color:darkgreen"| PA10 |
+ | | bgcolor="#FFFFFF" align="center" | ↔ | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | *USB OTG ID (socket) '''*1''' | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:grey" | PA11 | ||
+ | | bgcolor="#FFFFFF" align="center" | ↔ | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | * | + | *22R → USB OTG DM (socket) (not broken out to IO pin) |
|- | |- | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" style="color:grey" | PA12 |
− | | bgcolor="#FFFFFF" | ↔ | + | | bgcolor="#FFFFFF" align="center" | ↔ |
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | * | + | *22R → USB OTG DP (socket) (not broken out to IO pin) |
|- | |- | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | PA13 |
− | | bgcolor="#FFFFFF" | ↔ | + | | bgcolor="#FFFFFF" align="center" | ↔ |
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | * | + | *ST link SWDIO |
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#FFFFFF" | PA14 |
− | | bgcolor="# | + | | bgcolor="#FFFFFF" align="center" | ↔ |
− | | bgcolor="# | + | | bgcolor="#FFFFFF" | |
− | * | + | *ST link SWCLK |
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#FFFFFF" style="color:green" | PA15 |
− | | bgcolor="# | + | | bgcolor="#FFFFFF" | |
− | | bgcolor="# | + | | bgcolor="#FFFFFF" | |
− | + | ||
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#F0F0F0” style="color:green" | PB0 |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
+ | |- | ||
+ | | bgcolor="#F0F0F0” style="color:green" | PB1 | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” | PB2 | ||
+ | | bgcolor="#F0F0F0” align="center" | ← | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | *VDD → 10k → PB2 → 510R → GND | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” | PB3 | ||
+ | | bgcolor="#F0F0F0” align="center" | ↔ | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | *ST link SWO | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” style="color:green" | PB4 | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” style="color:green" | PB5 | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” | PB6 | ||
+ | | bgcolor="#F0F0F0” align="center" | ↔ | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | *Audio CS43L22 SCL | ||
*4.7k pullup | *4.7k pullup | ||
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#F0F0F0” style="color:green" | PB7 |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | + | ||
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#F0F0F0” style="color:green" | PB8 |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
+ | |- | ||
+ | | bgcolor="#F0F0F0” | PB9 | ||
+ | | bgcolor="#F0F0F0” align="center" | ↔ | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | *Audio CS43L22 SDA | ||
*4.7k pullup | *4.7k pullup | ||
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | PB10 |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” align="center" | → |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | *MP45DT02 CLK | + | *MP45DT02 (mic) CLK IN |
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#F0F0F0” style="color:green" | PB11 |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | + | ||
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#F0F0F0” style="color:green" | PB12 |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | + | |- | |
+ | | bgcolor="#F0F0F0” style="color:green" | PB13 | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” style="color:green" | PB14 | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” style="color:green" | PB15 | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | | bgcolor="#F0F0F0” | | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PC0 | | bgcolor="#FFFFFF" | PC0 | ||
− | | bgcolor="#FFFFFF" | → | + | | bgcolor="#FFFFFF" align="center" | → |
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
+ | *USB OTG VBUS switch /EN | ||
*10k pullup | *10k pullup | ||
− | + | |- | |
+ | | bgcolor="#FFFFFF" style="color:green" | PC1 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PC2 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PC3 | | bgcolor="#FFFFFF" | PC3 | ||
− | | bgcolor="#FFFFFF" | ← | + | | bgcolor="#FFFFFF" align="center" | ← |
+ | | bgcolor="#FFFFFF" | | ||
+ | *MP45DT02 (mic) PDM OUT | ||
+ | *→ 1.2K → Audio CS43L22 AIN4 | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PC4 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PC5 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PC6 | ||
+ | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | |||
|- | |- | ||
| bgcolor="#FFFFFF" | PC7 | | bgcolor="#FFFFFF" | PC7 | ||
− | | bgcolor="#FFFFFF" | → | + | | bgcolor="#FFFFFF" align="center" | → |
+ | | bgcolor="#FFFFFF" | | ||
+ | *Audio CS43L22 I2S3 MCK | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PC8 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PC9 | ||
+ | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | |||
|- | |- | ||
| bgcolor="#FFFFFF" | PC10 | | bgcolor="#FFFFFF" | PC10 | ||
− | | bgcolor="#FFFFFF" | → | + | | bgcolor="#FFFFFF" align="center" | → |
+ | | bgcolor="#FFFFFF" | | ||
+ | *Audio CS43L22 I2S3 SCK | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PC11 | ||
+ | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | |||
|- | |- | ||
| bgcolor="#FFFFFF" | PC12 | | bgcolor="#FFFFFF" | PC12 | ||
− | | bgcolor="#FFFFFF" | → | + | | bgcolor="#FFFFFF" align="center" | → |
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | *CS43L22 | + | *Audio CS43L22 I2S3 SD |
|- | |- | ||
− | | bgcolor="#FFFFFF" | PC13 | + | | bgcolor="#FFFFFF" style="color:green" | PC13 |
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" | |
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | |||
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#FFFFFF" style="color:green" | PC14 |
− | | bgcolor="# | + | | bgcolor="#FFFFFF" | |
− | | bgcolor="# | + | | bgcolor="#FFFFFF" | |
− | * | + | *can be used for OSC32 IN |
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#FFFFFF" style="color:green" | PC15 |
− | | bgcolor="# | + | | bgcolor="#FFFFFF" | |
− | | bgcolor="# | + | | bgcolor="#FFFFFF" | |
− | * | + | *can be used for OSC32 OUT |
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#F0F0F0” style="color:green" | PD0 |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | + | ||
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#F0F0F0” style="color:green" | PD1 |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | + | ||
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#F0F0F0” style="color:green" | PD2 |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | + | ||
|- | |- | ||
− | | | + | | bgcolor="#F0F0F0” style="color:green" | PD3 |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | | bgcolor="# | + | | bgcolor="#F0F0F0” | |
− | *<span style="color: | + | |- |
+ | | bgcolor="#F0F0F0” | PD4 | ||
+ | | bgcolor="#F0F0F0” align="center" | → | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | *Audio CS43L22 /RESET | ||
+ | *10K pulldown | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” | PD5 | ||
+ | | bgcolor="#F0F0F0” align="center" | ← | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | *USB OTG VBUS switch /FAULT (eg. overcurrent) | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” style="color:green" | PD6 | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” style="color:green" | PD7 | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” style="color:green" | PD8 | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” style="color:green" | PD9 | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” style="color:green" | PD10 | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” style="color:green" | PD11 | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” | PD12 | ||
+ | | bgcolor="#F0F0F0” align="center" | → | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | *510R → <span style="color:green">green LED</span> → GND | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” | PD13 | ||
+ | | bgcolor="#F0F0F0” align="center" | → | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | *680R → <span style="color:orange">orange LED</span> → GND | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” | PD14 | ||
+ | | bgcolor="#F0F0F0” align="center" | → | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | *680R → <span style="color:red">red LED</span> → GND | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” | PD15 | ||
+ | | bgcolor="#F0F0F0” align="center" | → | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | *680R → <span style="color:blue">blue LED</span> → GND | ||
|- | |- | ||
| bgcolor="#FFFFFF" | PE0 | | bgcolor="#FFFFFF" | PE0 | ||
+ | | bgcolor="#FFFFFF" align="center" | ← | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | + | *LIS302DL (accelerometer) INT1 | |
− | *LIS302DL INT1 | + | |
|- | |- | ||
| bgcolor="#FFFFFF" | PE1 | | bgcolor="#FFFFFF" | PE1 | ||
+ | | bgcolor="#FFFFFF" align="center" | ← | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | *LIS302DL (accelerometer) INT2 | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PE2 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | |||
|- | |- | ||
| bgcolor="#FFFFFF" | PE3 | | bgcolor="#FFFFFF" | PE3 | ||
+ | | bgcolor="#FFFFFF" align="center" | → | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | *LIS302DL (accelerometer) ICS I2C/SPI (1: I2C mode; 0: SPI enabled) | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PE4 | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | |||
|- | |- | ||
− | | bgcolor="#FFFFFF" | | + | | bgcolor="#FFFFFF" style="color:green" | PE5 |
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
| bgcolor="#FFFFFF" | | | bgcolor="#FFFFFF" | | ||
− | |||
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#FFFFFF" style="color:green" | PE6 |
− | | bgcolor="# | + | | bgcolor="#FFFFFF" | |
− | | bgcolor="# | + | | bgcolor="#FFFFFF" | |
− | + | ||
|- | |- | ||
− | | bgcolor="# | + | | bgcolor="#FFFFFF" style="color:green" | PE7 |
− | | bgcolor="# | + | | bgcolor="#FFFFFF" | |
− | | bgcolor="# | + | | bgcolor="#FFFFFF" | |
− | * | + | |- |
+ | | bgcolor="#FFFFFF" style="color:green" | PE8 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PE9 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PE10 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PE11 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PE12 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PE13 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PE14 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#FFFFFF" style="color:green" | PE15 | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | | bgcolor="#FFFFFF" | | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” style="color:grey" | PH0 | ||
+ | | bgcolor="#F0F0F0” align="center" | ← | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | *OSC IN (SB13 disconnected by default, floating breakout) | ||
+ | |- | ||
+ | | bgcolor="#F0F0F0” style="color:grey" | PH1 | ||
+ | | bgcolor="#F0F0F0” align="center" | → | ||
+ | | bgcolor="#F0F0F0” | | ||
+ | *OSC OUT (SB14 disconnected by default, floating breakout) | ||
|} | |} | ||
− | ''' | + | '''Note:'''<br /> |
− | *1. | + | *1. not free if USB socket in use |
− | + | ||
− | + | ||
=== CPU core === | === CPU core === | ||
Line 4,443: | Line 4,811: | ||
This can be done by setting bits 20 to 23 in CPACR (address 0xE000ED88)<br /> | This can be done by setting bits 20 to 23 in CPACR (address 0xE000ED88)<br /> | ||
If using C, this can be done by: | If using C, this can be done by: | ||
− | + | ||
− | #define CPACR | + | #define CPACR (*((volatile unsigned long *) 0xE000ED88)) |
CPACR |= 0xFu<<20; | CPACR |= 0xFu<<20; | ||
− | + | ||
+ | If the CPU still crashes then there are FPU instruction before the point the FPU is enabled or it is not in a privileged mode that makes it possible to access the CPACR register (datasheet is unclear). | ||
+ | |||
+ | This assembly code can be used to enable the FPU before main() is run: | ||
+ | LDR.W R0, =0xE000ED88 | ||
+ | LDR R1, [R0] | ||
+ | ORR R1, R1, #(0xF << 20) | ||
+ | STR R1, [R0] | ||
+ | DSB | ||
+ | ISB |
Latest revision as of 06:45, 30 January 2017
Contents
STM32F407VG Microcontroller Overview
High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 192 Kbyte RAM, 168 MHz CPU, Art Accelerator
- 1 Mbyte of 128 bit wide FLASH with 64 cache lines with prefetch for instructions and 8 cache lines for data.
- Ethernet MAC - 10/100 Mbit/s
- USB - 1 x USB OTG FS, 1 x USB OTX HS
- CRC calculation unit - CRC-32 (Ethernet)
- Hash processor - SHA-1, SHA-224, SHA-256, MD5, HMAC
- Cryptographic processor - DES, Triple-DES, AES-128, AES-192, AES-256
- Flexible static memory controller (FSMC) for 8 or 16 bit external memory
- Random number generator - 32 bit every 40 cycles of PLL48CLK
Documents and files
- ARM: Cortex-M3 Thumb-2 instruction set
- Latest version of Keil µVision (Register for free to get the download link)
- STM32F407VG microcontroller datasheet
- ARM Cortex®-M4 Technical Reference Manual
- STM32F40xxx Reference Manual
- Programming manual
- STM32F407VG resources (click the Design Resources tab)
GPIO
The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or source up to ±20 mA (with a relaxed VOL/VOH) except PC13, PC14 and PC15 which can sink or source up to ±3mA. When using the PC13 to PC15 GPIOs in output mode, the speed should not exceed 2 MHz with a maximum load of 30 pF.
Memory
Each main block of memory is on a different layer of the bus matrix and can be accessed independently by CPU core or DMA.
Embedded Flash Name Address Size Bus* Description Main 0x0800 0000 1MB ID Sectors: 4 x 16KB, 1 x 64KB, 7 x 128KB System 0x1FFF 0000 30KB ID Bootloader OTP 0x1FFF 7800 528B ID 512 Bytes of one-time programmable memory for user data and 16 lock bytes Option 0x1FFF C000 16B ID Configuration of read and write protection, BOR level, watchdog, software/hardware and reset SRAM Name Address Size Bus Description SRAM1 0x2000 0000 112KB IDS Main internal SRAM SRAM2 0x2001 C000 16KB S Auxiliary internal SRAM CCM 0x1000 0000 64KB D Core coupled memory ( only accessible by CPU ) BKPSRAM 0x4002 4000 4KB S Backup SRAM ( Battery backup domain ) FSMC B1 0x6000 0000 256MB IDS NOR / PSRAM ( Flexible static memory controller (External memory) ) FSMC B2 0x7000 0000 256MB IDS NAND Flash FSMC B3 0x8000 0000 256MB IDS NAND Flash FSMC B4 0x9000 0000 256MB IDS PC Card *I = Instruction bus, D = Data bus, S = System bus
Pin functions
- Functions are not in any particular order. For actual implementation and programming values, see Alternate function mapping
Pin | Function 1 | Function 2 | Function 3 | Function 4 | Function 5 | Function 6 | Function 7 | Function 8 | Function 9 | Function 10 | Function 11 | Notes |
PA0 | USART2_CTS | UART4_TX | ETH_MII_CRS | TIM2_CH1_ETR | TIM5_CH1 | TIM8_ETR | EVENTOUT | ADC123_IN0 | WKUP(4) |
| ||
PA1 | USART2_RTS | UART4_RX | ETH_RMII_REF_CLK | ETH_MII_RX_CLK | TIM5_CH2 | TIM2_CH2 | EVENTOUT | ADC123_IN1 |
| |||
PA2 | USART2_TX | TIM5_CH3 | TIM9_CH1 | TIM2_CH3 | ETH_MDIO | EVENTOUT | ADC123_IN2 |
| ||||
PA3 | USART2_RX | TIM5_CH4 | TIM9_CH2 | TIM2_CH4 | OTG_HS_ULPI_D0 | ETH_MII_COL | EVENTOUT | ADC123_IN3 |
| |||
PA4 | SPI1_NSS | SPI3_NSS | USART2_CK | DCMI_HSYNC | OTG_HS_SOF | I2S3_WS | EVENTOUT | ADC12_IN4 | DAC_OUT1 |
| ||
PA5 | SPI1_SCK | OTG_HS_ULPI_CK | TIM2_CH1_ETR | TIM8_CH1N | EVENTOUT | ADC12_IN5 | DAC_OUT2 |
| ||||
PA6 | SPI1_MISO | TIM8_BKIN | TIM13_CH1 | DCMI_PIXCLK | TIM3_CH1 | TIM1_BKIN | EVENTOUT | ADC12_IN6 |
| |||
PA7 | SPI1_MOSI | TIM8_CH1N | TIM14_CH1 | TIM3_CH2 | ETH_MII_RX_DV | TIM1_CH1N | ETH_RMII_CRS_DV | EVENTOUT | ADC12_IN7 |
| ||
PA8 | MCO1 | USART1_CK | TIM1_CH1 | I2C3_SCL | OTG_FS_SOF | EVENTOUT |
| |||||
PA9 | USART1_TX | TIM1_CH2 | I2C3_SMBA | DCMI_D0 | EVENTOUT | OTG_FS_VBUS |
| |||||
PA10 | USART1_RX | TIM1_CH3 | OTG_FS_ID | DCMI_D1 | EVENTOUT |
| ||||||
PA11 | USART1_CTS | CAN1_RX | TIM1_CH4 | OTG_FS_DM | EVENTOUT |
| ||||||
PA12 | USART1_RTS | CAN1_TX | TIM1_ETR | OTG_FS_DP | EVENTOUT |
| ||||||
PA13 | JTMS-SWDIO | EVENTOUT |
| |||||||||
PA14 | JTCK-SWCLK | EVENTOUT |
| |||||||||
PA15 | JTDI | SPI3_NSS | I2S3_WS | TIM2_CH1_ETR | SPI1_NSS | EVENTOUT |
| |||||
PB0 | TIM3_CH3 | TIM8_CH2N | OTG_HS_ULPI_D1 | ETH_MII_RXD2 | TIM1_CH2N | EVENTOUT | ADC12_IN8 |
| ||||
PB1 | TIM3_CH4 | TIM8_CH3N | OTG_HS_ULPI_D2 | ETH_MII_RXD3 | TIM1_CH3N | EVENTOUT | ADC12_IN9 |
| ||||
PB2 | BOOT1 | EVENTOUT |
| |||||||||
PB3 | JTDO | TRACESWO | SPI3_SCK | I2S3_CK | TIM2_CH2 | SPI1_SCK | EVENTOUT |
| ||||
PB4 | NJTRST | SPI3_MISO | TIM3_CH1 | SPI1_MISO | I2S3ext_SD | EVENTOUT |
| |||||
PB5 | I2C1_SMBA | CAN2_RX | OTG_HS_ULPI_D7 | ETH_PPS_OUT | TIM3_CH 2 | SPI1_MOSI | SPI3_MOSI | DCMI_D10 | I2S3_SD | EVENTOUT |
| |
PB6 | I2C1_SCL | TIM4_CH1 | CAN2_TX | DCMI_D5 | USART1_TX | EVENTOUT |
| |||||
PB7 | I2C1_SDA | FSMC_NL | DCMI_VSYNC | USART1_RX | TIM4_CH2 | EVENTOUT |
| |||||
PB8 | TIM4_CH3 | SDIO_D4 | TIM10_CH1 | DCMI_D6 | ETH_MII_TXD3 | I2C1_SCL | CAN1_RX | EVENTOUT |
| |||
PB9 | SPI2_NSS | I2S2_WS | TIM4_CH4 | TIM11_CH1 | SDIO_D5 | DCMI_D7 | I2C1_SDA | CAN1_TX | EVENTOUT |
| ||
PB10 | SPI2_SCK | I2S2_CK | I2C2_SCL | USART3_TX | OTG_HS_ULPI_D3 | ETH_MII_RX_ER | TIM2_CH3 | EVENTOUT |
| |||
PB11 | I2C2_SDA | USART3_RX | OTG_HS_ULPI_D4 | ETH_RMII_TX_EN | ETH_MII_TX_EN | TIM2_CH4 | EVENTOUT |
| ||||
PB12 | SPI2_NSS | I2S2_WS | I2C2_SMBA | USART3_CK | TIM1_BKIN | CAN2_RX | OTG_HS_ULPI_D5 | ETH_RMII_TXD0 | ETH_MII_TXD0 | OTG_HS_ID | EVENTOUT |
|
PB13 | SPI2_SCK | I2S2_CK | USART3_CTS | TIM1_CH1N | CAN2_TX | OTG_HS_ULPI_D6 | ETH_RMII_TXD1 | ETH_MII_TXD1 | EVENTOUT | OTG_HS_VBUS |
| |
PB14 | SPI2_MISO | TIM1_CH2N | TIM12_CH1 | OTG_HS_DM | USART3_RTS | TIM8_CH2N | I2S2ext_SD | EVENTOUT |
| |||
PB15 | SPI2_MOSI | I2S2_SD | TIM1_CH3N | TIM8_CH3N | TIM12_CH2 | OTG_HS_DP | EVENTOUT | RTC_REFIN |
| |||
PC0 | OTG_HS_ULPI_STP | EVENTOUT | ADC123_IN10 |
| ||||||||
PC1 | ETH_MDC | EVENTOUT | ADC123_IN11 |
| ||||||||
PC2 | SPI2_MISO | OTG_HS_ULPI_DIR | ETH_MII_TXD2 | I2S2ext_SD | EVENTOUT | ADC123_IN12 |
| |||||
PC3 | SPI2_MOSI | I2S2_SD | OTG_HS_ULPI_NXT | ETH_MII_TX_CLK | EVENTOUT | ADC123_IN13 |
| |||||
PC4 | ETH_RMII_RX_D0 | ETH_MII_RX_D0 | EVENTOUT | ADC12_IN14 |
| |||||||
PC5 | ETH_RMII_RX_D1 | ETH_MII_RX_D1 | EVENTOUT | ADC12_IN15 |
| |||||||
PC6 | I2S2_MCK | TIM8_CH1 | SDIO_D6 | USART6_TX | DCMI_D0 | TIM3_CH1 | EVENTOUT |
| ||||
PC7 | I2S3_MCK | TIM8_CH2 | SDIO_D7 | USART6_RX | DCMI_D1 | TIM3_CH2 | EVENTOUT |
| ||||
PC8 | TIM8_CH3 | SDIO_D0 | TIM3_CH3 | USART6_CK | DCMI_D2 | EVENTOUT |
| |||||
PC9 | I2S_CKIN | MCO2 | TIM8_CH4 | SDIO_D1 | I2C3_SDA | DCMI_D3 | TIM3_CH4 | EVENTOUT |
| |||
PC10 | SPI3_SCK | I2S3_CK | UART4_TX | SDIO_D2 | DCMI_D8 | USART3_TX | EVENTOUT |
| ||||
PC11 | UART4_RX | SPI3_MISO | SDIO_D3 | DCMI_D4 | USART3_RX | I2S3ext_SD | EVENTOUT |
| ||||
PC12 | UART5_TX | SDIO_CK | DCMI_D9 | SPI3_MOSI | I2S3_SD | USART3_CK | EVENTOUT |
| ||||
PC13 | EVENTOUT | RTC_OUT | RTC_TAMP1 | RTC_TS |
| |||||||
PC14 | EVENTOUT | OSC32_IN(4) |
| |||||||||
PC15 | EVENTOUT | OSC32_OUT(4) |
| |||||||||
PD0 | FSMC_D2 | CAN1_RX | EVENTOUT |
| ||||||||
PD1 | FSMC_D3 | CAN1_TX | EVENTOUT |
| ||||||||
PD2 | TIM3_ETR | UART5_RX | SDIO_CMD | DCMI_D11 | EVENTOUT |
| ||||||
PD3 | FSMC_CLK | USART2_CTS | EVENTOUT |
| ||||||||
PD4 | FSMC_NOE | USART2_RTS | EVENTOUT |
| ||||||||
PD5 | FSMC_NWE | USART2_TX | EVENTOUT |
| ||||||||
PD6 | FSMC_NWAIT | USART2_RX | EVENTOUT |
| ||||||||
PD7 | USART2_CK | FSMC_NE1 | FSMC_NCE2 | EVENTOUT |
| |||||||
PD8 | FSMC_D13 | USART3_TX | EVENTOUT |
| ||||||||
PD9 | FSMC_D14 | USART3_RX | EVENTOUT |
| ||||||||
PD10 | FSMC_D15 | USART3_CK | EVENTOUT |
| ||||||||
PD11 | FSMC_CLE | FSMC_A16 | USART3_CT S | EVENTOUT |
| |||||||
PD12 | FSMC_ALE | FSMC_A17 | TIM4_CH1 | USART3_RTS | EVENTOUT |
| ||||||
PD13 | FSMC_A18 | TIM4_CH2 | EVENTOUT |
| ||||||||
PD14 | FSMC_D0 | TIM4_CH3 | EVENTOUT | EVENTOUT |
| |||||||
PD15 | FSMC_D1 | TIM4_CH4 | EVENTOUT |
| ||||||||
PE0 | TIM4_ETR | FSMC_NBL0 | DCMI_D2 | EVENTOUT |
| |||||||
PE1 | FSMC_NBL1 | DCMI_D3 | EVENTOUT |
| ||||||||
PE2 | TRACECLK | FSMC_A23 | ETH_MII_TXD3 | EVENTOUT |
| |||||||
PE3 | TRACED0 | FSMC_A19 | EVENTOUT |
| ||||||||
PE4 | TRACED1 | FSMC_A20 | DCMI_D4 | EVENTOUT |
| |||||||
PE5 | TRACED2 | FSMC_A21 | TIM9_CH1 | DCMI_D6 | EVENTOUT |
| ||||||
PE6 | TRACED3 | FSMC_A22 | TIM9_CH2 | DCMI_D7 | EVENTOUT |
| ||||||
PE7 | FSMC_D4 | TIM1_ETR | EVENTOUT |
| ||||||||
PE8 | FSMC_D5 | TIM1_CH1N | EVENTOUT |
| ||||||||
PE9 | FSMC_D6 | TIM1_CH1 | EVENTOUT |
| ||||||||
PE10 | FSMC_D7 | TIM1_CH2N | EVENTOUT |
| ||||||||
PE11 | FSMC_D8 | TIM1_CH2 | EVENTOUT |
| ||||||||
PE12 | FSMC_D9 | TIM1_CH3N | EVENTOUT |
| ||||||||
PE13 | FSMC_D10 | TIM1_CH3 | EVENTOUT |
| ||||||||
PE14 | FSMC_D11 | TIM1_CH4 | EVENTOUT |
| ||||||||
PE15 | FSMC_D12 | TIM1_BKIN | EVENTOUT |
| ||||||||
PH0 | EVENTOUT | OSC_IN(4) |
| |||||||||
PH1 | EVENTOUT | OSC_OUT(4) |
|
Alternate function mapping
Pin | AF 0 | AF 1 | AF 2 | AF 3 | AF 4 | AF 5 | AF 6 | AF 7 | AF 8 | AF 9 | AF 10 | AF 11 | AF 12 | AF 13 | AF 14 | AF 15 |
SYS | TIM1/2 | TIM3/4/5 | TIM8/9/10/11 | I2C1/2/3 | SPI1/SPI2/I2S2/I2S2ext | SPI3/I2Sext/I2S3 | USART1/2/3/I2S3ext | UART4/5/USART6 | CAN1/CAN2/TIM12/13/14 | OTG_FS/OTG_HS | ETH | FSMC/SDIO/OTG_FS | DCMI | |||
PA0 | TIM2_CH1_ETR | TIM5_CH1 | TIM8_ETR | USART2_CTS | UART4_TX | ETH_MII_CRS | EVENTOUT | |||||||||
PA1 | TIM2_CH2 | TIM5_CH2 | USART2_RTS | UART4_RX | ETH_MII_RX_CLK ETH_RMII_REF_CLK |
EVENTOUT | ||||||||||
PA2 | TIM2_CH3 | TIM5_CH3 | TIM9_CH1 | USART2_TX | ETH_MDIO | EVENTOUT | ||||||||||
PA3 | TIM2_CH4 | TIM5_CH4 | TIM9_CH2 | USART2_RX | OTG_HS_ULPI_D0 | ETH _MII_COL | EVENTOUT | |||||||||
PA4 | SPI1_NSS | SPI3_NSS I2S3_WS |
USART2_CK | OTG_HS_SOF | DCMI_HSYNC | EVENTOUT | ||||||||||
PA5 | TIM2_CH1_ETR | TIM8_CH1N | SPI1_SCK | OTG_HS_ULPI_CK | EVENTOUT | |||||||||||
PA6 | TIM1_BKIN | TIM3_CH1 | TIM8_BKIN | SPI1_MISO | TIM13_CH1 | DCMI_PIXCK | EVENTOUT | |||||||||
PA7 | TIM1_CH1N | TIM3_CH2 | TIM8_CH1N | SPI1_MOSI | TIM14_CH1 | ETH_MII_RX_DV ETH_RMII_CRS_DV |
EVENTOUT | |||||||||
PA8 | MCO1 | TIM1_CH1 | I2C3_SCL | USART1_CK | OTG_FS_SOF | EVENTOUT | ||||||||||
PA9 | TIM1_CH2 | I2C3_SMBA | USART1_TX | DCMI_D0 | EVENTOUT | |||||||||||
PA10 | TIM1_CH3 | USART1_RX | OTG_FS_ID | DCMI_D1 | EVENTOUT | |||||||||||
PA11 | TIM1_CH4 | USART1_CTS | CAN1_RX | OTG_FS_DM | EVENTOUT | |||||||||||
PA12 | TIM1_ETR | USART1_RTS | CAN1_TX | OTG_FS_DP | EVENTOUT | |||||||||||
PA13 | JTMS-SWDIO | |||||||||||||||
PA14 | JTCK-SWCLK | |||||||||||||||
PA15 | JTDI | TIM2_CH1 TIM2_ETR |
SPI1_NSS | SPI3_NSS I2S3_WS |
||||||||||||
PB0 | TIM1_CH2N | TIM3_CH3 | TIM8_CH2N | OTG_HS_ULPI_D1 | ETH _MII_RXD2 | EVENTOUT | ||||||||||
PB1 | TIM1_CH3N | TIM3_CH4 | TIM8_CH3N | OTG_HS_ULPI_D2 | ETH_MII_RXD3 | EVENTOUT | ||||||||||
PB2 | EVENTOUT | |||||||||||||||
PB3 | JTDO TRACESWO |
TIM2_CH2 | SPI1_SCK | SPI3_SCK I2S3_CK |
EVENTOUT | |||||||||||
PB4 | NJTRST | TIM3_CH1 | SPI1_MISO | SPI3_MISO | I2S3ext_SD | EVENTOUT | ||||||||||
PB5 | TIM3_CH2 | I2C1_SMBA | SPI1_MOSI | SPI3_MOSI I2S3_SD |
CAN2_RX | OTG_HS_ULPI_D7 | ETH_PPS_OUT | DCMI_D10 | EVENTOUT | |||||||
PB6 | TIM4_CH1 | I2C1_SCL | USART1_TX | CAN2_TX | DCMI_D5 | EVENTOUT | ||||||||||
PB7 | TIM4_CH2 | I2C1_SDA | USART1_RX | FSMC_NL | DCMI_VSYNC | EVENTOUT | ||||||||||
PB8 | TIM4_CH3 | TIM10_CH1 | I2C1_SCL | CAN1_RX | ETH _MII_TXD3 | SDIO_D4 | DCMI_D6 | EVENTOUT | ||||||||
PB9 | TIM4_CH4 | TIM11_CH1 | I2C1_SDA | SPI2_NSS I2S2_WS |
CAN1_TX | SDIO_D5 | DCMI_D7 | EVENTOUT | ||||||||
PB10 | TIM2_CH3 | I2C2_SCL | SPI2_SCK I2S2_CK |
USART3_TX | OTG_HS_ULPI_D3 | ETH_MII_RX_ER | EVENTOUT | |||||||||
PB11 | TIM2_CH4 | I2C2_SDA | USART3_RX | OTG_HS_ULPI_D4 | ETH_MII_TX_EN ETH_RMII_TX_EN |
EVENTOUT | ||||||||||
PB12 | TIM1_BKIN | I2C2_SMBA | SPI2_NSS I2S2_WS |
USART3_CK | CAN2_RX | OTG_HS_ULPI_D5 | ETH_MII_TXD0 ETH_RMII_TXD0 |
OTG_HS_ID | EVENTOUT | |||||||
PB13 | TIM1_CH1N | SPI2_SCK I2S2_CK |
USART3_CTS | CAN2_TX | OTG_HS_ULPI_D6 | ETH_MII_TXD1 ETH_RMII_TXD1 |
EVENTOUT | |||||||||
PB14 | TIM1_CH2N | TIM8_CH2N | SPI2_MISO | I2S2ext_SD | USART3_RTS | TIM12_CH1 | OTG_HS_DM | EVENTOUT | ||||||||
PB15 | RTC_REFIN | TIM1_CH3N | TIM8_CH3N | SPI2_MOSI I2S2_SD |
TIM12_CH2 | OTG_HS_DP | EVENTOUT | |||||||||
PC0 | OTG_HS_ULPI_STP | EVENTOUT | ||||||||||||||
PC1 | ETH_MDC | EVENTOUT | ||||||||||||||
PC2 | SPI2_MISO | I2S2ext_SD | OTG_HS_ULPI_DIR | ETH _MII_TXD2 | EVENTOUT | |||||||||||
PC3 | SPI2_MOSI I2S2_SD |
OTG_HS_ULPI_NXT | ETH_MII_TX_CLK | EVENTOUT | ||||||||||||
PC4 | ETH_MII_RXD0 ETH_RMII_RXD0 |
EVENTOUT | ||||||||||||||
PC5 | ETH _MII_RXD1 ETH _RMII_RXD1 |
EVENTOUT | ||||||||||||||
PC6 | TIM3_CH1 | TIM8_CH1 | I2S2_MCK | USART6_TX | SDIO_D6 | DCMI_D0 | EVENTOUT | |||||||||
PC7 | TIM3_CH2 | TIM8_CH2 | I2S3_MCK | USART6_RX | SDIO_D7 | DCMI_D1 | EVENTOUT | |||||||||
PC8 | TIM3_CH3 | TIM8_CH3 | USART6_CK | SDIO_D0 | DCMI_D2 | EVENTOUT | ||||||||||
PC9 | MCO2 | TIM3_CH4 | TIM8_CH4 | I2C3_SDA | I2S_CKIN | SDIO_D1 | DCMI_D3 | EVENTOUT | ||||||||
PC10 | SPI3_SCK I2S3_CK |
USART3_TX | UART4_TX | SDIO_D2 | DCMI_D8 | EVENTOUT | ||||||||||
PC11 | I2S3ext_SD | SPI3_MISO | USART3_RX | UART4_RX | SDIO_D3 | DCMI_D4 | EVENTOUT | |||||||||
PC12 | SPI3_MOSI I2S3_SD |
USART3_CK | UART5_TX | SDIO_CK | DCMI_D9 | EVENTOUT | ||||||||||
PC13 | EVENTOUT | |||||||||||||||
PC14 | EVENTOUT | |||||||||||||||
PC15 | EVENTOUT | |||||||||||||||
PD0 | CAN1_RX | FSMC_D2 | EVENTOUT | |||||||||||||
PD1 | CAN1_TX | FSMC_D3 | EVENTOUT | |||||||||||||
PD2 | UART5_RX | SDIO_CMD | DCMI_D11 | EVENTOUT | ||||||||||||
PD3 | USART2_CTS | FSMC_CLK | EVENTOUT | |||||||||||||
PD4 | USART2_RTS | FSMC_NOE | EVENTOUT | |||||||||||||
PD5 | USART2_TX | FSMC_NWE | EVENTOUT | |||||||||||||
PD6 | USART2_RX | FSMC_NWAIT | EVENTOUT | |||||||||||||
PD7 | USART2_CK | FSMC_NE1 FSMC_NCE2 |
EVENTOUT | |||||||||||||
PD8 | USART3_TX | FSMC_D13 | EVENTOUT | |||||||||||||
PD9 | USART3_RX | FSMC_D14 | EVENTOUT | |||||||||||||
PD10 | USART3_CK | FSMC_D15 | EVENTOUT | |||||||||||||
PD11 | USART3_CTS | FSMC_A16 | EVENTOUT | |||||||||||||
PD12 | TIM4_CH1 | USART3_RTS | FSMC_A17 | EVENTOUT | ||||||||||||
PD13 | TIM4_CH2 | FSMC_A18 | EVENTOUT | |||||||||||||
PD14 | TIM4_CH3 | FSMC_D0 | EVENTOUT | |||||||||||||
PD15 | TIM4_CH4 | FSMC_D1 | EVENTOUT | |||||||||||||
PE0 | TIM4_ETR | FSMC_NBL0 | DCMI_D2 | EVENTOUT | ||||||||||||
PE1 | FSMC_NBL1 | DCMI_D3 | EVENTOUT | |||||||||||||
PE2 | TRACECLK | ETH _MII_TXD3 | FSMC_A23 | EVENTOUT | ||||||||||||
PE3 | TRACED0 | FSMC_A19 | EVENTOUT | |||||||||||||
PE4 | TRACED1 | FSMC_A20 | DCMI_D4 | EVENTOUT | ||||||||||||
PE5 | TRACED2 | TIM9_CH1 | FSMC_A21 | DCMI_D6 | EVENTOUT | |||||||||||
PE6 | TRACED3 | TIM9_CH2 | FSMC_A22 | DCMI_D7 | EVENTOUT | |||||||||||
PE7 | TIM1_ETR | FSMC_D4 | EVENTOUT | |||||||||||||
PE8 | IM1_CH1N | FSMC_D5 | EVENTOUT | |||||||||||||
PE9 | TIM1_CH1 | FSMC_D6 | EVENTOUT | |||||||||||||
PE10 | TIM1_CH2N | FSMC_D7 | EVENTOUT | |||||||||||||
PE11 | TIM1_CH2 | FSMC_D8 | EVENTOUT | |||||||||||||
PE12 | TIM1_CH3N | FSMC_D9 | EVENTOUT | |||||||||||||
PE13 | TIM1_CH3 | FSMC_D10 | EVENTOUT | |||||||||||||
PE14 | TIM1_CH4 | FSMC_D11 | EVENTOUT | |||||||||||||
PE15 | TIM1_BKIN | FSMC_D12 | EVENTOUT | |||||||||||||
PF0 | I2C2_SDA | FSMC_A0 | EVENTOUT | |||||||||||||
PF1 | I2C2_SCL | FSMC_A1 | EVENTOUT | |||||||||||||
PF2 | 2C2_SMBA | FSMC_A2 | EVENTOUT | |||||||||||||
PF3 | FSMC_A3 | EVENTOUT | ||||||||||||||
PF4 | FSMC_A4 | EVENTOUT | ||||||||||||||
PF5 | FSMC_A5 | EVENTOUT | ||||||||||||||
PF6 | TIM10_CH1 | FSMC_NIORD | EVENTOUT | |||||||||||||
PF7 | TIM11_CH1 | FSMC_NREG | EVENTOUT | |||||||||||||
PF8 | TIM13_CH1 | FSMC_NIOWR | EVENTOUT | |||||||||||||
PF9 | TIM14_CH1 | FSMC_CD | EVENTOUT | |||||||||||||
PF10 | FSMC_INTR | EVENTOUT | ||||||||||||||
PF11 | DCMI_D12 | EVENTOUT | ||||||||||||||
PF12 | FSMC_A6 | EVENTOUT | ||||||||||||||
PF13 | FSMC_A7 | EVENTOUT | ||||||||||||||
PF14 | FSMC_A8 | EVENTOUT | ||||||||||||||
PF15 | FSMC_A9 | EVENTOUT | ||||||||||||||
PG0 | FSMC_A10 | EVENTOUT | ||||||||||||||
PG1 | FSMC_A11 | EVENTOUT | ||||||||||||||
PG2 | FSMC_A12 | EVENTOUT | ||||||||||||||
PG3 | FSMC_A13 | EVENTOUT | ||||||||||||||
PG4 | FSMC_A14 | EVENTOUT | ||||||||||||||
PG5 | FSMC_A15 | EVENTOUT | ||||||||||||||
PG6 | FSMC_INT2 | EVENTOUT | ||||||||||||||
PG7 | USART6_CK | FSMC_INT3 | EVENTOUT | |||||||||||||
PG8 | USART6_RTS | ETH _PPS_OUT | EVENTOUT | |||||||||||||
PG9 | USART6_RX | FSMC_NE2 FSMC_NCE3 |
EVENTOUT | |||||||||||||
PG10 | FSMC_NCE4_1 FSMC_NE3 |
EVENTOUT | ||||||||||||||
PG11 | ETH _MII_TX_EN ETH _RMII_TX_EN |
FSMC_NCE4_2 | EVENTOUT | |||||||||||||
PG12 | USART6_RTS | FSMC_NE4 | EVENTOUT | |||||||||||||
PG13 | UART6_CTS | ETH _MII_TXD0 ETH _RMII_TXD0 |
FSMC_A24 | EVENTOUT | ||||||||||||
PG14 | USART6_TX | ETH _MII_TXD1 ETH _RMII_TXD1 |
FSMC_A25 | EVENTOUT | ||||||||||||
PG15 | USART6_CTS | DCMI_D13 | EVENTOUT | |||||||||||||
PH0 | EVENTOUT | |||||||||||||||
PH1 | EVENTOUT | |||||||||||||||
PH2 | ETH _MII_CRS | EVENTOUT | ||||||||||||||
PH3 | ETH _MII_COL | EVENTOUT | ||||||||||||||
PH4 | I2C2_SCL | OTG_HS_ULPI_NXT | EVENTOUT | |||||||||||||
PH5 | I2C2_SDA | EVENTOUT | ||||||||||||||
PH6 | I2C2_SMBA | TIM12_CH1 | ETH _MII_RXD2 | EVENTOUT | ||||||||||||
PH7 | I2C3_SCL | ETH _MII_RXD3 | EVENTOUT | |||||||||||||
PH8 | I2C3_SDA | DCMI_HSYNC | EVENTOUT | |||||||||||||
PH9 | I2C3_SMBA | TIM12_CH2 | DCMI_D0 | EVENTOUT | ||||||||||||
PH10 | TIM5_CH1 | DCMI_D1 | EVENTOUT | |||||||||||||
PH11 | TIM5_CH2 | DCMI_D2 | EVENTOUT | |||||||||||||
PH12 | TIM5_CH3 | DCMI_D3 | EVENTOUT | |||||||||||||
PH13 | TIM8_CH1N | CAN1_TX | EVENTOUT | |||||||||||||
PH14 | TIM8_CH2N | DCMI_D4 | EVENTOUT | |||||||||||||
PH15 | TIM8_CH3N | DCMI_D11 | EVENTOUT | |||||||||||||
PI0 | TIM5_CH4 | SPI2_NSS I2S2_WS |
DCMI_D13 | EVENTOUT | ||||||||||||
PI1 | SPI2_SCK I2S2_CK |
DCMI_D8 | EVENTOUT | |||||||||||||
PI2 | TIM8_CH4 | SPI2_MISO | I2S2ext_SD | DCMI_D8 | EVENTOUT | |||||||||||
PI3 | TIM8_ETR | SPI2_MOSI I2S2_SD |
DCMI_D8 | EVENTOUT | ||||||||||||
PI4 | TIM8_BKIN | DCMI_D5 | EVENTOUT | |||||||||||||
PI5 | TIM8_CH1 | DCMI_VSYNC | EVENTOUT | |||||||||||||
PI6 | TIM8_CH2 | DCMI_D6 | EVENTOUT | |||||||||||||
PI7 | TIM8_CH3 | DCMI_D7 | EVENTOUT | |||||||||||||
PI8 | EVENTOUT | |||||||||||||||
PI9 | CAN1_RX | EVENTOUT | ||||||||||||||
PI10 | ETH _MII_RX_ER | EVENTOUT | ||||||||||||||
PI11 | OTG_HS_ULPI_DIR | EVENTOUT | ||||||||||||||
PI12 | ||||||||||||||||
PI13 | ||||||||||||||||
PI14 | ||||||||||||||||
PI15 |
ADC Mapping
Channel | ADC1 | ADC2 | ADC3 |
0 | PA0 | PA0 | PA0 |
1 | PA1 | PA1 | PA1 |
2 | PA2 | PA2 | PA2 |
3 | PA3 | PA3 | PA3 |
4 | PA4 | PA4 | |
5 | PA5 | PA5 | |
6 | PA6 | PA6 | |
7 | PA7 | PA7 | |
8 | PB0 | PB0 | |
9 | PB1 | PB1 | |
10 | PC0 | PC0 | PC0 |
11 | PC1 | PC1 | PC1 |
12 | PC2 | PC2 | PC2 |
13 | PC3 | PC3 | PC3 |
14 | PC4 | PC4 | |
15 | PC5 | PC5 | |
16 | temperature sensor | ||
17 | VREFINT | ||
18 | VBAT/2 |
STM32F4DISCOVERY Development Board Overview
- (STM32F407VGT6 microcontroller featuring 32-bit ARM Cortex-M4F core, 1 MB Flash, 192 KB RAM in an LQFP100 package
- On-board ST-LINK/V2 with selection mode switch to use the kit as a standalone ST- LINK/V2 (with SWD (Serial Wire Debug) connector for programming and debugging)
- Board power supply: through USB bus or from an external 5 V supply voltage
- External application power supply: 3 V and 5 V
- LIS302DL, ST MEMS motion sensor, 3-axis digital output accelerometer
- MP45DT02, ST MEMS audio sensor, omni-directional digital microphone
- CS43L22, audio DAC with integrated class D speaker driver
- Eight LEDs:
- LD1 (red/green) for USB communication
- LD2 (red) for 3.3 V power on
- Four user LEDs
- LD3 (orange)
- LD4 (green)
- LD5 (red)
- LD6 (blue)
- 2 USB OTG LEDs
- LD7 (green) VBus
- LD8 (red) over-current
- Two push buttons
- user
- reset
- USB OTG FS with micro-AB connector
- Extension header for all LQFP100 I/Os for quick connection to prototyping board and easy probing
Documents and files
- Discovery kit for STM32 F4 series - with STM32F407VG MCU
- STM32F4 high-performance discovery board
- Schematic
- User manual - getting started
- User manual
- Programming manual
- Example code
- About example code
Pinout
Available pins on board
Bit | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 113 | 14 | 15 |
Port A | PA0 | PA1 | PA2 | PA3 | PA4 | PA5 | PA6 | PA7 | PA8 | PA9 | PA10 | PA13 | PA14 | PA15 | ||
Port B | PB0 | PB1 | PB2 | PB3 | PB4 | PB5 | PB6 | PB7 | PB8 | PB9 | PB10 | PB11 | PB12 | PB13 | PB14 | PB15 |
Port C | PC0 | PC1 | PC2 | PC3 | PC4 | PC5 | PC6 | PC7 | PC8 | PC9 | PC10 | PC11 | PC12 | PC13 | PC14 | PC15 |
Port D | PD0 | PD1 | PD2 | PD3 | PD4 | PD5 | PD6 | PD7 | PD8 | PD9 | PD10 | PD11 | PD12 | PD13 | PD14 | PD15 |
Port E | PE0 | PE1 | PE2 | PE3 | PE4 | PE5 | PE6 | PE7 | PE8 | PE9 | PE10 | PE11 | PE12 | PE13 | PE14 | PE15 |
Port F | ||||||||||||||||
Port G | ||||||||||||||||
Port H | PH0 | PH1 | ||||||||||||||
Port I |
Usable Peripherals
Note: this is an incomplete list, based on ongoing development and testing
Peripheral | Function | Pin |
USART1 | TX | PA9 (1) |
USART1 | RX | PA10 |
USART2 | TX | PA2 |
USART2 | RX | PA3 |
USART3 | TX | PB10 |
USART3 | RX | PB11 |
UART4 | TX | PA0 |
UART4 | RX | PA1 |
UART5 | TX | PC12 |
UART5 | RX | PD2 |
USART6 | TX | PC6 |
USART6 | RX | PC7 |
DAC | OUT1 | PA4 |
DAC | OUT2 | PA5 (2) |
1) garbled characters received
2) level may be slightly higher then channel 1 with buffer disabled due to external component input pin. Recommended use of buffer.
PCB IO map
Pin | Direction | Connected to |
PA0 | ← |
|
PA1 | ||
PA2 | ||
PA3 | ||
PA4 | → |
|
PA5 | → |
|
PA6 | ← |
|
PA7 | → |
|
PA8 | ||
PA9 | ← |
|
PA10 | ↔ |
|
PA11 | ↔ |
|
PA12 | ↔ |
|
PA13 | ↔ |
|
PA14 | ↔ |
|
PA15 | ||
PB0 | ||
PB1 | ||
PB2 | ← |
|
PB3 | ↔ |
|
PB4 | ||
PB5 | ||
PB6 | ↔ |
|
PB7 | ||
PB8 | ||
PB9 | ↔ |
|
PB10 | → |
|
PB11 | ||
PB12 | ||
PB13 | ||
PB14 | ||
PB15 | ||
PC0 | → |
|
PC1 | ||
PC2 | ||
PC3 | ← |
|
PC4 | ||
PC5 | ||
PC6 | ||
PC7 | → |
|
PC8 | ||
PC9 | ||
PC10 | → |
|
PC11 | ||
PC12 | → |
|
PC13 | ||
PC14 |
| |
PC15 |
| |
PD0 | ||
PD1 | ||
PD2 | ||
PD3 | ||
PD4 | → |
|
PD5 | ← |
|
PD6 | ||
PD7 | ||
PD8 | ||
PD9 | ||
PD10 | ||
PD11 | ||
PD12 | → |
|
PD13 | → |
|
PD14 | → |
|
PD15 | → |
|
PE0 | ← |
|
PE1 | ← |
|
PE2 | ||
PE3 | → |
|
PE4 | ||
PE5 | ||
PE6 | ||
PE7 | ||
PE8 | ||
PE9 | ||
PE10 | ||
PE11 | ||
PE12 | ||
PE13 | ||
PE14 | ||
PE15 | ||
PH0 | ← |
|
PH1 | → |
|
Note:
- 1. not free if USB socket in use
CPU core
Programming
IMPORTANT: If using Keil µVision with hardware FPU selected in the project options, please be sure to enable the FPU before any floating point numbers are loaded or processed.
This can be done by setting bits 20 to 23 in CPACR (address 0xE000ED88)
If using C, this can be done by:
#define CPACR (*((volatile unsigned long *) 0xE000ED88)) CPACR |= 0xFu<<20;
If the CPU still crashes then there are FPU instruction before the point the FPU is enabled or it is not in a privileged mode that makes it possible to access the CPACR register (datasheet is unclear).
This assembly code can be used to enable the FPU before main() is run:
LDR.W R0, =0xE000ED88 LDR R1, [R0] ORR R1, R1, #(0xF << 20) STR R1, [R0] DSB ISB