Difference between revisions of "Raspberry Pi 3"
From ScienceZero
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# boots off of an on chip rom of some sort | # boots off of an on chip rom of some sort | ||
# reads the sd card and looks for additional gpu specific boot files bootcode.bin and start.elf in the root dir of the first partition (fat32 formatted, loader.bin no longer used/required) | # reads the sd card and looks for additional gpu specific boot files bootcode.bin and start.elf in the root dir of the first partition (fat32 formatted, loader.bin no longer used/required) | ||
| − | # in the same dir it looks for config.txt which you can do things like | + | # in the same dir it looks for config.txt which you can do things like change the arm speed, or change the address where to load kernel.img, and many others |
| − | change the arm speed, or change the address where to load kernel.img, and many others | + | |
# it reads kernel.img the arm boot binary file and copies it to memory | # it reads kernel.img the arm boot binary file and copies it to memory | ||
# releases reset on the arm such that it runs from the address where the kernel.img data was written | # releases reset on the arm such that it runs from the address where the kernel.img data was written | ||
Revision as of 16:33, 28 August 2017
- Quad Core 1.2GHz Broadcom BCM2837 64bit CPU
- 1GB LPDDR2 RAM
- BCM43438 WiFi 802.11 b/g/n (2.4GHz) and Bluetooth 4.1 LE
- 40-pin extended GPIO
- 4 USB 2 ports
- Full size HDMI 1.4 socket with CEC and 3.5mm composite video jack
- CSI camera port for connecting a Raspberry Pi camera
- DSI display port for connecting a Raspberry Pi touchscreen display
- 3.5 mm audio jack (Shared with composite video)
- 1 × UART, 1 × SPI, 2 × I2C, PCM/I2S, 2 × PWM
- 26 × GPIO
- Micro SD card slot
- 10/100M Ethernet
Contents
CPU
4 × ARM Cortex A53
- 8-stage pipelined processor with 2-way superscalar, in-order execution pipeline
- DSP and NEON SIMD extensions are mandatory per core
- VFPv4 Floating Point Unit onboard (per core)
- Hardware virtualization support
- TrustZone security extensions
- 64-byte cache lines
- 32kB Level 1 cache, 10-entry TLB
- 512kB Level 2 cache, 512-entry TLB
- 4 KiB conditional branch predictor, 256-entry indirect branch predictor
AArch32 features
- Has 15 general-purpose 32-bit registers (R0-R14).
- PC is mapped to R15
AArch64 features
- New instruction set, A64
- Has 31 general-purpose 64-bit registers. (32 bit, W0-W30) (64 bit, X0-X30)
- Has dedicated zero or stack pointer (SP) register (depending on instruction).
- The program counter (PC) is no longer directly accessible as a register.
- Instructions are still 32 bits long and mostly the same as A32 (with LDM/STM instructions and most conditional execution dropped).
- Has paired loads/stores (in place of LDM/STM).
- No predication for most instructions (except branches).
- Most instructions can take 32-bit or 64-bit arguments.
- Addresses assumed to be 64-bit.
- Advanced SIMD (NEON) enhanced
- Has 32 × 128-bit registers (up from 16), also accessible via VFPv4.
- IEEE 754 compliant double-precision floating point.
- AES encrypt/decrypt and SHA-1/SHA-2 hashing instructions also use these registers.
Links
VideoCore
Dual 400MHz VideoCore IV, 3D core at 300MHz. OpenGL ES 2.0, hardware-accelerated OpenVG, and 1080p30 H.264 high-profile decode. Capable of 1Gpixel/s, 1.5Gtexel/s or 24GFLOPs with texture filtering and DMA infrastructure.
Links
BCM43438 wifi/Bluetooth
Links
Bare metal programming
Boot sequence
- boots off of an on chip rom of some sort
- reads the sd card and looks for additional gpu specific boot files bootcode.bin and start.elf in the root dir of the first partition (fat32 formatted, loader.bin no longer used/required)
- in the same dir it looks for config.txt which you can do things like change the arm speed, or change the address where to load kernel.img, and many others
- it reads kernel.img the arm boot binary file and copies it to memory
- releases reset on the arm such that it runs from the address where the kernel.img data was written
The memory is split between the GPU and the ARM, I believe the default is to split the memory in half. And there are ways to change that split (to give the ARM more)(using config.txt). Not going to worry about that here.
From the ARMs perspective the kernel.img file is loaded, by default, to address 0x8000. (there are ways to change that, not going to worry about that right now).
Links
- http://arm.flatassembler.net/
- https://www.raspberrypi.org/documentation/hardware/raspberrypi/schematics/Raspberry-Pi-3B-V1.2-Schematics.pdf
- https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
