Memory management unit

From ScienceZero
Jump to: navigation, search

A memory management unit is is a layer of hardware between a CPU and memory. The virtual address space of a CPU is divided into pages and each page has an entry in a table describing access rights and what physical memory address it maps to.

The page table is too large to fit in a CPU so the most recent entries are cached in the translation lookaside buffer. If a program is accessing memory in many different areas the TLB will not be able to fit all the needed entries and there is a large drop in performance as the CPU must load the page entry from memory for each memory access.