ARM: 64 bit operations
From ScienceZero
Contents
Logical shift left by Rn (0-32)
;R0 - least significant word ;R1 - most significant word ;R2 - shift ;Uses R0-R3 ;7 cycles constant mov r1,r1,lsl r2 rsb r3,r2,#32 orr r1,1,r0,lsr r3 mov r0,r0,lsl r2
Logical shift left by Rn (0-64)
;R0 - least significant word ;R1 - most significant word ;R2 - shift ;Uses R0-R3 ; 8-9 cycles rsbs r3,r2,#32 submi r3,r2,#32 movmi r1,r0,lsl r3 movpl r1,r1,lsl r2 orrpl r1,r1,r0,lsr r3 mov r0,r0,lsl r2
Logical shift left by #n (0-32)
;R0 - least significant word ;R1 - most significant word ;Uses R0-R1 ;3 cycles constant mov r1,r1,lsl #n orr r1,r1,r0,lsr #32-n mov r0,r0,lsl #n
Logical shift left by #n (33-64)
;R0 - least significant word ;R1 - most significant word ;Uses R0-R1 ;2 cycles constant mov r1,r0,lsl #n-32 mov r0,#0
Logical shift left by 1
;R0 - least significant word ;R1 - most significant word ;Uses R0-R1 ;2 cycles constant adds r0,r0,r0 adc r1,r1,r1