ARM: 64 bit operations

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Revision as of 19:21, 12 October 2007 by Bjoern (Talk | contribs) (New page: Logical shift left by Rn ;R0 - least significant word ;R1 - most significant word ;R2 - shift ;Uses R0-R3 ;7 cycles constant mov r1,r1,lsl r...)

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Logical shift left by Rn

       ;R0 - least significant word
       ;R1 - most significant word
       ;R2 - shift
       ;Uses R0-R3
       ;7 cycles constant
       mov	r1,r1,lsl r2
       rsb	r3,r2,#32
       orr	r1,1,r0,lsr r3
       mov	r0,r0,lsl r2


Logical shift left by #n

       ;R0 - least significant word
       ;R1 - most significant word
       ;Uses R0-R1
       ;3 cycles constant
       mov	r1,r1,lsl #n
       orr	r1,r1,r0,lsr #32-n
       mov	r0,r0,lsl #n


Logical shift left by 1

       ;R0 - least significant word
       ;R1 - most significant word
       ;Uses R0-R1
       ;2 cycles constant
       adds	r0,r0,r0
       adc	r1,r1,r1


Multiplication