Difference between revisions of "A16 CPU"
From ScienceZero
(New page: thumb ==A16 - High Performance 16 bit RISC CPU== *Harvard style architecture that executes all instructions in a single clock cycle. *8 registers, the pro...) |
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*All instructions execute in a single clock cycle. | *All instructions execute in a single clock cycle. | ||
*Branch-link instruction where the program counter is copied to R6. | *Branch-link instruction where the program counter is copied to R6. | ||
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| + | [http://www.sciencezero.org/computing/download/a16%20emulator.zip Emulator and assembler (a16 emulator.zip 19 KB)] | ||
[[Category:computing]] | [[Category:computing]] | ||
Revision as of 00:59, 30 January 2007
A16 - High Performance 16 bit RISC CPU
- Harvard style architecture that executes all instructions in a single clock cycle.
- 8 registers, the program counter is mapped to register 8.
- Conditional execution of all instructions.
- Condition flags are set on demand.
- All instructions execute in a single clock cycle.
- Branch-link instruction where the program counter is copied to R6.
